* [PATCH v8 1/3] dt-bindings: reset: microchip sparx5 reset driver bindings
[not found] <20210316090839.3207930-1-steen.hegelund@microchip.com>
@ 2021-03-16 9:08 ` Steen Hegelund
2021-03-23 22:07 ` Rob Herring
2021-03-16 9:08 ` [PATCH v8 3/3] arm64: dts: reset: add microchip sparx5 switch reset driver Steen Hegelund
1 sibling, 1 reply; 3+ messages in thread
From: Steen Hegelund @ 2021-03-16 9:08 UTC (permalink / raw)
To: Philipp Zabel, Rob Herring
Cc: Steen Hegelund, Andrew Lunn, Microchip Linux Driver Support,
Alexandre Belloni, Gregory Clement, linux-kernel,
linux-arm-kernel, devicetree
Document the Sparx5 reset device driver bindings
The driver uses a syscon and an IO range on sparx5 for access to
the reset control and the reset status.
Sparx5 will no longer use the existing Ocelot chip reset driver, but use
this new switch reset driver as it has the reset controller interface that
allows the first client to perform the reset on behalf of all the Sparx5
component drivers.
Signed-off-by: Steen Hegelund <steen.hegelund@microchip.com>
---
.../bindings/reset/microchip,rst.yaml | 58 +++++++++++++++++++
1 file changed, 58 insertions(+)
create mode 100644 Documentation/devicetree/bindings/reset/microchip,rst.yaml
diff --git a/Documentation/devicetree/bindings/reset/microchip,rst.yaml b/Documentation/devicetree/bindings/reset/microchip,rst.yaml
new file mode 100644
index 000000000000..370579aeeca1
--- /dev/null
+++ b/Documentation/devicetree/bindings/reset/microchip,rst.yaml
@@ -0,0 +1,58 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/reset/microchip,rst.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: Microchip Sparx5 Switch Reset Controller
+
+maintainers:
+ - Steen Hegelund <steen.hegelund@microchip.com>
+ - Lars Povlsen <lars.povlsen@microchip.com>
+
+description: |
+ The Microchip Sparx5 Switch provides reset control and implements the following
+ functions
+ - One Time Switch Core Reset (Soft Reset)
+
+properties:
+ $nodename:
+ pattern: "^reset-controller@[0-9a-f]+$"
+
+ compatible:
+ const: microchip,sparx5-switch-reset
+
+ reg:
+ items:
+ - description: global control block registers
+
+ reg-names:
+ items:
+ - const: gcb
+
+ "#reset-cells":
+ const: 1
+
+ cpu-syscon:
+ $ref: "/schemas/types.yaml#/definitions/phandle"
+ description: syscon used to access CPU reset
+
+required:
+ - compatible
+ - reg
+ - reg-names
+ - "#reset-cells"
+ - cpu-syscon
+
+additionalProperties: false
+
+examples:
+ - |
+ reset: reset-controller@11010008 {
+ compatible = "microchip,sparx5-switch-reset";
+ reg = <0x11010008 0x4>;
+ reg-names = "gcb";
+ #reset-cells = <1>;
+ cpu-syscon = <&cpu_ctrl>;
+ };
+
--
2.30.2
^ permalink raw reply related [flat|nested] 3+ messages in thread* [PATCH v8 3/3] arm64: dts: reset: add microchip sparx5 switch reset driver
[not found] <20210316090839.3207930-1-steen.hegelund@microchip.com>
2021-03-16 9:08 ` [PATCH v8 1/3] dt-bindings: reset: microchip sparx5 reset driver bindings Steen Hegelund
@ 2021-03-16 9:08 ` Steen Hegelund
1 sibling, 0 replies; 3+ messages in thread
From: Steen Hegelund @ 2021-03-16 9:08 UTC (permalink / raw)
To: Philipp Zabel, Rob Herring
Cc: Steen Hegelund, Andrew Lunn, Microchip Linux Driver Support,
Alexandre Belloni, Gregory Clement, linux-kernel,
linux-arm-kernel, devicetree
This provides reset driver support for the Microchip Sparx5 PCB134 and
PCB135 reference boards.
The Sparx5 Switch will no longer use the Ocelot Chip Reset Driver (with the
compatible string "microchip,sparx5-chip-reset"), but use a separate driver
that exposes a reset controller interface and has the compatiple string
"microchip,sparx5-switch-reset".
Eventually the Sparx5 reset support will be removed from the Ocelot chip
reset driver.
Signed-off-by: Steen Hegelund <steen.hegelund@microchip.com>
Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
---
arch/arm64/boot/dts/microchip/sparx5.dtsi | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/microchip/sparx5.dtsi b/arch/arm64/boot/dts/microchip/sparx5.dtsi
index 380281f312d8..dc3ada5cf9fc 100644
--- a/arch/arm64/boot/dts/microchip/sparx5.dtsi
+++ b/arch/arm64/boot/dts/microchip/sparx5.dtsi
@@ -132,9 +132,12 @@ mux: mux-controller {
};
};
- reset@611010008 {
- compatible = "microchip,sparx5-chip-reset";
+ reset: reset-controller@611010008 {
+ compatible = "microchip,sparx5-switch-reset";
reg = <0x6 0x11010008 0x4>;
+ reg-names = "gcb";
+ #reset-cells = <1>;
+ cpu-syscon = <&cpu_ctrl>;
};
uart0: serial@600100000 {
--
2.30.2
^ permalink raw reply related [flat|nested] 3+ messages in thread