From: Robert Hancock <robert.hancock@calian.com>
To: mturquette@baylibre.com, sboyd@kernel.org
Cc: mike.looijmans@topic.nl, robh+dt@kernel.org,
linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
Robert Hancock <robert.hancock@calian.com>
Subject: [PATCH v3 1/9] dt-bindings: clock: clk-si5341: Add new attributes
Date: Thu, 25 Mar 2021 13:26:35 -0600 [thread overview]
Message-ID: <20210325192643.2190069-2-robert.hancock@calian.com> (raw)
In-Reply-To: <20210325192643.2190069-1-robert.hancock@calian.com>
Add new silabs,xaxb-ext-clk and silabs,iovdd-33 properties.
Changed vdd-supply on top-level node to optional since it is not actually
used by the driver.
Removed vdd-supply from output sub-nodes, as it was not supported by the
driver and it is not easily possible to support this in that location with
the kernel regulator infrastructure. Changed to have vddoX-supply
attributes for each output on the top-level device node.
Signed-off-by: Robert Hancock <robert.hancock@calian.com>
---
.../devicetree/bindings/clock/silabs,si5341.txt | 16 ++++++++++------
1 file changed, 10 insertions(+), 6 deletions(-)
diff --git a/Documentation/devicetree/bindings/clock/silabs,si5341.txt b/Documentation/devicetree/bindings/clock/silabs,si5341.txt
index 504cce3abe46..ce55aba0ce22 100644
--- a/Documentation/devicetree/bindings/clock/silabs,si5341.txt
+++ b/Documentation/devicetree/bindings/clock/silabs,si5341.txt
@@ -24,9 +24,8 @@ it.
The device type, speed grade and revision are determined runtime by probing.
-The driver currently only supports XTAL input mode, and does not support any
-fancy input configurations. They can still be programmed into the chip and
-the driver will leave them "as is".
+The driver currently does not support any fancy input configurations. They can
+still be programmed into the chip and the driver will leave them "as is".
==I2C device node==
@@ -45,9 +44,9 @@ Required properties:
corresponding to inputs. Use a fixed clock for the "xtal" input.
At least one must be present.
- clock-names: One of: "xtal", "in0", "in1", "in2"
-- vdd-supply: Regulator node for VDD
Optional properties:
+- vdd-supply: Regulator node for VDD
- vdda-supply: Regulator node for VDDA
- vdds-supply: Regulator node for VDDS
- silabs,pll-m-num, silabs,pll-m-den: Numerator and denominator for PLL
@@ -60,7 +59,14 @@ Optional properties:
be initialized, and always performs the soft-reset routine. Since this will
temporarily stop all output clocks, don't do this if the chip is generating
the CPU clock for example.
+- silabs,xaxb-ext-clk: When present, indicates that the XA/XB pins are used
+ in EXTCLK (external reference clock) rather than XTAL (crystal) mode.
- interrupts: Interrupt for INTRb pin.
+- silabs,iovdd-33: When present, indicates that the I2C lines are using 3.3V
+ rather than 1.8V thresholds.
+- vddoX-supply (where X is an output index): Regulator node for VDDO for the
+ specified output. The driver selects the output VDD_SEL setting based on this
+ voltage.
- #address-cells: shall be set to 1.
- #size-cells: shall be set to 0.
@@ -77,8 +83,6 @@ Required child node properties:
- reg: number of clock output.
Optional child node properties:
-- vdd-supply: Regulator node for VDD for this output. The driver selects default
- values for common-mode and amplitude based on the voltage.
- silabs,format: Output format, one of:
1 = differential (defaults to LVDS levels)
2 = low-power (defaults to HCSL levels)
--
2.27.0
next prev parent reply other threads:[~2021-03-25 19:28 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-25 19:26 [PATCH v3 0/9] Si5341 driver updates Robert Hancock
2021-03-25 19:26 ` Robert Hancock [this message]
2021-03-27 15:27 ` [PATCH v3 1/9] dt-bindings: clock: clk-si5341: Add new attributes Rob Herring
2021-06-28 3:02 ` Stephen Boyd
2021-03-25 19:26 ` [PATCH v3 2/9] clk: si5341: Wait for DEVICE_READY on startup Robert Hancock
2021-06-28 3:02 ` Stephen Boyd
2021-03-25 19:26 ` [PATCH v3 3/9] clk: si5341: Avoid divide errors due to bogus register contents Robert Hancock
2021-06-28 3:02 ` Stephen Boyd
2021-03-25 19:26 ` [PATCH v3 4/9] clk: si5341: Check for input clock presence and PLL lock on startup Robert Hancock
2021-06-28 3:02 ` Stephen Boyd
2021-03-25 19:26 ` [PATCH v3 5/9] clk: si5341: Update initialization magic Robert Hancock
2021-06-28 3:02 ` Stephen Boyd
2021-03-25 19:26 ` [PATCH v3 6/9] clk: si5341: Allow different output VDD_SEL values Robert Hancock
2021-06-28 3:02 ` Stephen Boyd
2021-03-25 19:26 ` [PATCH v3 7/9] clk: si5341: Add silabs,xaxb-ext-clk property Robert Hancock
2021-06-28 3:02 ` Stephen Boyd
2021-03-25 19:26 ` [PATCH v3 8/9] clk: si5341: Add silabs,iovdd-33 property Robert Hancock
2021-06-28 3:02 ` Stephen Boyd
2021-03-25 19:26 ` [PATCH v3 9/9] clk: si5341: Add sysfs properties to allow checking/resetting device faults Robert Hancock
2021-06-28 3:03 ` Stephen Boyd
2021-04-07 16:50 ` [PATCH v3 0/9] Si5341 driver updates Robert Hancock
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