From: Robert Hancock <robert.hancock@calian.com>
To: mturquette@baylibre.com, sboyd@kernel.org
Cc: mike.looijmans@topic.nl, robh+dt@kernel.org,
linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
Robert Hancock <robert.hancock@calian.com>
Subject: [PATCH v3 7/9] clk: si5341: Add silabs,xaxb-ext-clk property
Date: Thu, 25 Mar 2021 13:26:41 -0600 [thread overview]
Message-ID: <20210325192643.2190069-8-robert.hancock@calian.com> (raw)
In-Reply-To: <20210325192643.2190069-1-robert.hancock@calian.com>
Add a property to allow specifying that the device XA/XB pins are used for
an external clock input rather than for a clock crystal.
Signed-off-by: Robert Hancock <robert.hancock@calian.com>
---
drivers/clk/clk-si5341.c | 9 +++++++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/clk-si5341.c b/drivers/clk/clk-si5341.c
index 28ac7085f362..c5ab4a5ae6a5 100644
--- a/drivers/clk/clk-si5341.c
+++ b/drivers/clk/clk-si5341.c
@@ -80,6 +80,7 @@ struct clk_si5341 {
u8 num_outputs;
u8 num_synth;
u16 chip_id;
+ bool xaxb_ext_clk;
};
#define to_clk_si5341(_hw) container_of(_hw, struct clk_si5341, hw)
@@ -529,9 +530,11 @@ static int si5341_clk_reparent(struct clk_si5341 *data, u8 index)
if (err < 0)
return err;
- /* Power up XTAL oscillator and buffer */
+ /* Power up XTAL oscillator and buffer, select clock mode */
err = regmap_update_bits(data->regmap, SI5341_XAXB_CFG,
- SI5341_XAXB_CFG_PDNB, SI5341_XAXB_CFG_PDNB);
+ SI5341_XAXB_CFG_PDNB | SI5341_XAXB_CFG_EXTCLK_EN,
+ SI5341_XAXB_CFG_PDNB | (data->xaxb_ext_clk ?
+ SI5341_XAXB_CFG_EXTCLK_EN : 0));
if (err < 0)
return err;
}
@@ -1539,6 +1542,8 @@ static int si5341_probe(struct i2c_client *client,
initialization_required = !err;
}
+ data->xaxb_ext_clk = of_property_read_bool(client->dev.of_node,
+ "silabs,xaxb-ext-clk");
if (initialization_required) {
/* Populate the regmap cache in preparation for "cache only" */
--
2.27.0
next prev parent reply other threads:[~2021-03-25 19:28 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-25 19:26 [PATCH v3 0/9] Si5341 driver updates Robert Hancock
2021-03-25 19:26 ` [PATCH v3 1/9] dt-bindings: clock: clk-si5341: Add new attributes Robert Hancock
2021-03-27 15:27 ` Rob Herring
2021-06-28 3:02 ` Stephen Boyd
2021-03-25 19:26 ` [PATCH v3 2/9] clk: si5341: Wait for DEVICE_READY on startup Robert Hancock
2021-06-28 3:02 ` Stephen Boyd
2021-03-25 19:26 ` [PATCH v3 3/9] clk: si5341: Avoid divide errors due to bogus register contents Robert Hancock
2021-06-28 3:02 ` Stephen Boyd
2021-03-25 19:26 ` [PATCH v3 4/9] clk: si5341: Check for input clock presence and PLL lock on startup Robert Hancock
2021-06-28 3:02 ` Stephen Boyd
2021-03-25 19:26 ` [PATCH v3 5/9] clk: si5341: Update initialization magic Robert Hancock
2021-06-28 3:02 ` Stephen Boyd
2021-03-25 19:26 ` [PATCH v3 6/9] clk: si5341: Allow different output VDD_SEL values Robert Hancock
2021-06-28 3:02 ` Stephen Boyd
2021-03-25 19:26 ` Robert Hancock [this message]
2021-06-28 3:02 ` [PATCH v3 7/9] clk: si5341: Add silabs,xaxb-ext-clk property Stephen Boyd
2021-03-25 19:26 ` [PATCH v3 8/9] clk: si5341: Add silabs,iovdd-33 property Robert Hancock
2021-06-28 3:02 ` Stephen Boyd
2021-03-25 19:26 ` [PATCH v3 9/9] clk: si5341: Add sysfs properties to allow checking/resetting device faults Robert Hancock
2021-06-28 3:03 ` Stephen Boyd
2021-04-07 16:50 ` [PATCH v3 0/9] Si5341 driver updates Robert Hancock
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