[PATCH v2 0/4] clk: ti: add am33xx spread spectrum clock support

[PATCH v2 0/4] clk: ti: add am33xx spread spectrum clock support

[Dario Binacchi]

As reported by the TI spruh73x RM, MPU and LCD modules support spread
spectrum clocking (SSC) on their output clocks. SSC is used to spread
the spectral peaking of the clock to reduce any electromagnetic
interference (EMI) that may be caused due to the clock’s fundamental
or any of its harmonics.
The series allows you to enable and adjust the spread spectrum clocking
for all am33xx PLLs for which it is supported.


Changes in v2:
- Remove SSC registers from dpll_core_ck@490 node (SSC is not supported)
- Add SSC registers to dpll_mpu_ck@488 node.
- Move the DT changes to the previous patch in the series.

Dario Binacchi (4):
  clk: ti: fix typo in routine description
  dt-bindings: ti: dpll: add spread spectrum support
  ARM: dts: am33xx-clocks: add spread spectrum support
  clk: ti: add am33xx spread spectrum clock support

 .../devicetree/bindings/clock/ti/dpll.txt     | 20 +++++
 arch/arm/boot/dts/am33xx-clocks.dtsi          |  4 +-
 drivers/clk/ti/dpll.c                         | 41 +++++++++
 drivers/clk/ti/dpll3xxx.c                     | 87 ++++++++++++++++++-
 include/linux/clk/ti.h                        | 24 +++++
 5 files changed, 173 insertions(+), 3 deletions(-)

-- 
2.17.1

[PATCH v2 2/4] dt-bindings: ti: dpll: add spread spectrum support

[Dario Binacchi]

DT bindings for enabling and adjusting spread spectrum clocking have
been added.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
---

(no changes since v1)

 .../devicetree/bindings/clock/ti/dpll.txt     | 20 +++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/Documentation/devicetree/bindings/clock/ti/dpll.txt b/Documentation/devicetree/bindings/clock/ti/dpll.txt
index df57009ff8e7..0810ae073294 100644
--- a/Documentation/devicetree/bindings/clock/ti/dpll.txt
+++ b/Documentation/devicetree/bindings/clock/ti/dpll.txt
@@ -42,6 +42,11 @@ Required properties:
 	"idlest" - contains the idle status register base address
 	"mult-div1" - contains the multiplier / divider register base address
 	"autoidle" - contains the autoidle register base address (optional)
+	"ssc-deltam" - DPLL supports spread spectrum clocking (SSC), contains
+		       the frequency spreading register base address (optional)
+	"ssc-modfreq" - DPLL supports spread spectrum clocking (SSC), contains
+		        the modulation frequency register base address
+			(optional)
   ti,am3-* dpll types do not have autoidle register
   ti,omap2-* dpll type does not support idlest / autoidle registers
 
@@ -51,6 +56,14 @@ Optional properties:
 	- ti,low-power-stop : DPLL supports low power stop mode, gating output
 	- ti,low-power-bypass : DPLL output matches rate of parent bypass clock
 	- ti,lock : DPLL locks in programmed rate
+	- ti,min-div : the minimum divisor to start from to round the DPLL
+		       target rate
+	- ti,ssc-deltam : DPLL supports spread spectrum clocking, frequency
+			  spreading in permille (10th of a percent)
+	- ti,ssc-modfreq : DPLL supports spread spectrum clocking, spread
+			   spectrum modulation frequency in kHz
+	- ti,ssc-downspread : DPLL supports spread spectrum clocking, boolean
+			      to enable the downspread feature
 
 Examples:
 	dpll_core_ck: dpll_core_ck@44e00490 {
@@ -83,3 +96,10 @@ Examples:
 		clocks = <&sys_ck>, <&sys_ck>;
 		reg = <0x0500>, <0x0540>;
 	};
+
+	dpll_disp_ck: dpll_disp_ck {
+		#clock-cells = <0>;
+		compatible = "ti,am3-dpll-no-gate-clock";
+		clocks = <&sys_clkin_ck>, <&sys_clkin_ck>;
+		reg = <0x0498>, <0x0448>, <0x0454>, <0x044c>, <0x0450>;
+	};
-- 
2.17.1

[PATCH v2 3/4] ARM: dts: am33xx-clocks: add spread spectrum support

[Dario Binacchi]

Registers for adjusting the spread spectrum clocking (SSC) have been
added. As reported by the TI spruh73x RM, SSC is supported only for
LCD and MPU PLLs.

Signed-off-by: Dario Binacchi <dariobin@libero.it>

---

Changes in v2:
- Remove SSC registers from dpll_core_ck@490 node (SSC is not supported)
- Add SSC registers to dpll_mpu_ck@488 node.

 arch/arm/boot/dts/am33xx-clocks.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/am33xx-clocks.dtsi b/arch/arm/boot/dts/am33xx-clocks.dtsi
index dced92a8970e..a02e0b1229a4 100644
--- a/arch/arm/boot/dts/am33xx-clocks.dtsi
+++ b/arch/arm/boot/dts/am33xx-clocks.dtsi
@@ -204,7 +204,7 @@
 		#clock-cells = <0>;
 		compatible = "ti,am3-dpll-clock";
 		clocks = <&sys_clkin_ck>, <&sys_clkin_ck>;
-		reg = <0x0488>, <0x0420>, <0x042c>;
+		reg = <0x0488>, <0x0420>, <0x042c>, <0x0424>, <0x0428>;
 	};
 
 	dpll_mpu_m2_ck: dpll_mpu_m2_ck@4a8 {
@@ -244,7 +244,7 @@
 		#clock-cells = <0>;
 		compatible = "ti,am3-dpll-no-gate-clock";
 		clocks = <&sys_clkin_ck>, <&sys_clkin_ck>;
-		reg = <0x0498>, <0x0448>, <0x0454>;
+		reg = <0x0498>, <0x0448>, <0x0454>, <0x044c>, <0x0450>;
 	};
 
 	dpll_disp_m2_ck: dpll_disp_m2_ck@4a4 {
-- 
2.17.1

Re: [PATCH v2 3/4] ARM: dts: am33xx-clocks: add spread spectrum support

[Tony Lindgren]

* Dario Binacchi <dariobin@libero.it> [210318 17:28]:
> Registers for adjusting the spread spectrum clocking (SSC) have been
> added. As reported by the TI spruh73x RM, SSC is supported only for
> LCD and MPU PLLs.

Probably best to keep the series together:

Acked-by: Tony Lindgren <tony@atomide.com>

Re: [PATCH v2 2/4] dt-bindings: ti: dpll: add spread spectrum support

[Rob Herring]

On Thu, Mar 18, 2021 at 06:26:24PM +0100, Dario Binacchi wrote:
> DT bindings for enabling and adjusting spread spectrum clocking have
> been added.
> 
> Signed-off-by: Dario Binacchi <dariobin@libero.it>
> ---
> 
> (no changes since v1)
> 
>  .../devicetree/bindings/clock/ti/dpll.txt     | 20 +++++++++++++++++++
>  1 file changed, 20 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/clock/ti/dpll.txt b/Documentation/devicetree/bindings/clock/ti/dpll.txt
> index df57009ff8e7..0810ae073294 100644
> --- a/Documentation/devicetree/bindings/clock/ti/dpll.txt
> +++ b/Documentation/devicetree/bindings/clock/ti/dpll.txt
> @@ -42,6 +42,11 @@ Required properties:
>  	"idlest" - contains the idle status register base address
>  	"mult-div1" - contains the multiplier / divider register base address
>  	"autoidle" - contains the autoidle register base address (optional)
> +	"ssc-deltam" - DPLL supports spread spectrum clocking (SSC), contains
> +		       the frequency spreading register base address (optional)
> +	"ssc-modfreq" - DPLL supports spread spectrum clocking (SSC), contains
> +		        the modulation frequency register base address
> +			(optional)
>    ti,am3-* dpll types do not have autoidle register
>    ti,omap2-* dpll type does not support idlest / autoidle registers
>  
> @@ -51,6 +56,14 @@ Optional properties:
>  	- ti,low-power-stop : DPLL supports low power stop mode, gating output
>  	- ti,low-power-bypass : DPLL output matches rate of parent bypass clock
>  	- ti,lock : DPLL locks in programmed rate
> +	- ti,min-div : the minimum divisor to start from to round the DPLL
> +		       target rate
> +	- ti,ssc-deltam : DPLL supports spread spectrum clocking, frequency
> +			  spreading in permille (10th of a percent)
> +	- ti,ssc-modfreq : DPLL supports spread spectrum clocking, spread
> +			   spectrum modulation frequency in kHz

Use a standard unit suffix (-hz or -mhz).

> +	- ti,ssc-downspread : DPLL supports spread spectrum clocking, boolean
> +			      to enable the downspread feature
>  
>  Examples:
>  	dpll_core_ck: dpll_core_ck@44e00490 {
> @@ -83,3 +96,10 @@ Examples:
>  		clocks = <&sys_ck>, <&sys_ck>;
>  		reg = <0x0500>, <0x0540>;
>  	};
> +
> +	dpll_disp_ck: dpll_disp_ck {
> +		#clock-cells = <0>;
> +		compatible = "ti,am3-dpll-no-gate-clock";
> +		clocks = <&sys_clkin_ck>, <&sys_clkin_ck>;
> +		reg = <0x0498>, <0x0448>, <0x0454>, <0x044c>, <0x0450>;
> +	};
> -- 
> 2.17.1
>