From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.7 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,INCLUDES_CR_TRAILER,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 90CBBC433DB for ; Mon, 29 Mar 2021 01:52:39 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 586BA61941 for ; Mon, 29 Mar 2021 01:52:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230306AbhC2BwH (ORCPT ); Sun, 28 Mar 2021 21:52:07 -0400 Received: from mail.kernel.org ([198.145.29.99]:54544 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229822AbhC2Bv4 (ORCPT ); Sun, 28 Mar 2021 21:51:56 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id DFEEB61941; Mon, 29 Mar 2021 01:51:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1616982715; bh=U0Y5HEp4vLgEt3OrK0G+AlzV4k+/QymqO4rrPYmLDWg=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=dT20VNVeUoj8H3ChZPXZla+P99WfnHv8Mnzy2scGz5waqBEfSy+U6dS4xFIjkgZBv mUtVCce8MHgk0yjq23piVjgyicmtuPZhWZBPQU+0UyD3C1l4BksxhkKYY7yOk2+L4n t0d+A2RlrWVAr2yH8iSFLpN2iv0r690Fe/0D2Me2tAwcFV2JqyaB0RNp7JlOxr+yXP vpKN5E9MmoNk0HuUbft0UATSY1FhXAO6qfGe7KH+OhGREhjgJvTkHGXMBBjl6Bq9Dw wv4dLzGz03UVgAsdM0kgklMdjqhMEPo1k80R9W+AAejxvYsO2f5zOI2wpwX5BQKzCK 1xOBcDX50CuTQ== Date: Mon, 29 Mar 2021 09:51:50 +0800 From: Shawn Guo To: Heiko Thiery Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Rob Herring , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Michael Walle Subject: Re: [PATCH v2] arm64: dts: imx8mq-kontron-pitx-imx8m: pass phy reset delays Message-ID: <20210329015149.GL22955@dragon> References: <20210323140019.14388-1-heiko.thiery@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20210323140019.14388-1-heiko.thiery@gmail.com> User-Agent: Mutt/1.9.4 (2018-02-28) Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Tue, Mar 23, 2021 at 03:00:21PM +0100, Heiko Thiery wrote: > The TI DP83867 PHY datasheet says: > T1: Post RESET stabilization time == 195us > T3: Hardware configuration pins transition to output drivers == 64us > T4: RESET pulse width == 1us > > So with a little overhead set 'reset-assert-us' to 10us (T4) and > 'reset-deassert-us' to 280us (T1+T3). > > Without these reset delays the board will hang during startup when > bootargs has ip=dhcp set. > > Fixes: 1dc7f3d79a1a ("arm64: dts: fsl: add support for Kontron pitx-imx8m board") > Signed-off-by: Heiko Thiery > --- > v2: > - add desciption what issue will be fixed > - add Fixes tag My branch is not a stable one, so I just squashed it into the original commit. Shawn