From: Rob Herring <robh@kernel.org>
To: Greentime Hu <greentime.hu@sifive.com>
Cc: paul.walmsley@sifive.com, hes@sifive.com, erik.danie@sifive.com,
zong.li@sifive.com, bhelgaas@google.com, aou@eecs.berkeley.edu,
mturquette@baylibre.com, sboyd@kernel.org,
lorenzo.pieralisi@arm.com, p.zabel@pengutronix.de,
alex.dewar90@gmail.com, khilman@baylibre.com,
hayashi.kunihiko@socionext.com, vidyas@nvidia.com,
jh80.chung@samsung.com, linux-pci@vger.kernel.org,
devicetree@vger.kernel.org, linux-riscv@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org,
helgaas@kernel.org
Subject: Re: [PATCH v4 4/6] dt-bindings: PCI: Add SiFive FU740 PCIe host controller
Date: Thu, 1 Apr 2021 11:54:12 -0500 [thread overview]
Message-ID: <20210401165412.GB573380@robh.at.kernel.org> (raw)
In-Reply-To: <20210401060054.40788-5-greentime.hu@sifive.com>
On Thu, Apr 01, 2021 at 02:00:52PM +0800, Greentime Hu wrote:
> Add PCIe host controller DT bindings of SiFive FU740.
>
> Signed-off-by: Greentime Hu <greentime.hu@sifive.com>
> ---
> .../bindings/pci/sifive,fu740-pcie.yaml | 109 ++++++++++++++++++
> 1 file changed, 109 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/pci/sifive,fu740-pcie.yaml
>
> diff --git a/Documentation/devicetree/bindings/pci/sifive,fu740-pcie.yaml b/Documentation/devicetree/bindings/pci/sifive,fu740-pcie.yaml
> new file mode 100644
> index 000000000000..ccb58e5f06d4
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pci/sifive,fu740-pcie.yaml
> @@ -0,0 +1,109 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/pci/sifive,fu740-pcie.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: SiFive FU740 PCIe host controller
> +
> +description: |+
> + SiFive FU740 PCIe host controller is based on the Synopsys DesignWare
> + PCI core. It shares common features with the PCIe DesignWare core and
> + inherits common properties defined in
> + Documentation/devicetree/bindings/pci/designware-pcie.txt.
> +
> +maintainers:
> + - Paul Walmsley <paul.walmsley@sifive.com>
> + - Greentime Hu <greentime.hu@sifive.com>
> +
> +allOf:
> + - $ref: /schemas/pci/pci-bus.yaml#
> +
> +properties:
> + compatible:
> + const: sifive,fu740-pcie
> +
> + reg:
> + maxItems: 3
> +
> + reg-names:
> + items:
> + - const: dbi
> + - const: config
> + - const: mgmt
> +
> + num-lanes:
> + const: 8
> +
> + msi-parent: true
> +
> + interrupt-names:
> + items:
> + - const: msi
> + - const: inta
> + - const: intb
> + - const: intc
> + - const: intd
> +
> + resets:
> + description: A phandle to the PCIe power up reset line.
How many (maxItems)?
> +
> + pwren-gpios:
> + description: Should specify the GPIO for controlling the PCI bus device power on.
> + maxItems: 1
Still need to list 'reset-gpios' here.
> +
> +required:
> + - dma-coherent
> + - num-lanes
> + - interrupts
> + - interrupt-names
> + - interrupt-parent
> + - interrupt-map-mask
> + - interrupt-map
> + - clock-names
> + - clocks
> + - resets
> + - pwren-gpios
> + - reset-gpios
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + bus {
> + #address-cells = <2>;
> + #size-cells = <2>;
> + #include <dt-bindings/clock/sifive-fu740-prci.h>
> +
> + pcie@e00000000 {
> + compatible = "sifive,fu740-pcie";
> + #address-cells = <3>;
> + #size-cells = <2>;
> + #interrupt-cells = <1>;
> + reg = <0xe 0x00000000 0x0 0x80000000>,
> + <0xd 0xf0000000 0x0 0x10000000>,
> + <0x0 0x100d0000 0x0 0x1000>;
> + reg-names = "dbi", "config", "mgmt";
> + device_type = "pci";
> + dma-coherent;
> + bus-range = <0x0 0xff>;
> + ranges = <0x81000000 0x0 0x60080000 0x0 0x60080000 0x0 0x10000>, /* I/O */
> + <0x82000000 0x0 0x60090000 0x0 0x60090000 0x0 0xff70000>, /* mem */
> + <0x82000000 0x0 0x70000000 0x0 0x70000000 0x0 0x1000000>, /* mem */
> + <0xc3000000 0x20 0x00000000 0x20 0x00000000 0x20 0x00000000>; /* mem prefetchable */
> + num-lanes = <0x8>;
> + interrupts = <56>, <57>, <58>, <59>, <60>, <61>, <62>, <63>, <64>;
> + interrupt-names = "msi", "inta", "intb", "intc", "intd";
> + interrupt-parent = <&plic0>;
> + interrupt-map-mask = <0x0 0x0 0x0 0x7>;
> + interrupt-map = <0x0 0x0 0x0 0x1 &plic0 57>,
> + <0x0 0x0 0x0 0x2 &plic0 58>,
> + <0x0 0x0 0x0 0x3 &plic0 59>,
> + <0x0 0x0 0x0 0x4 &plic0 60>;
> + clock-names = "pcie_aux";
> + clocks = <&prci PRCI_CLK_PCIE_AUX>;
> + resets = <&prci 4>;
> + pwren-gpios = <&gpio 5 0>;
> + reset-gpios = <&gpio 8 0>;
> + };
> + };
> --
> 2.30.2
>
next prev parent reply other threads:[~2021-04-01 18:08 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-01 6:00 [PATCH v4 0/6] Add SiFive FU740 PCIe host controller driver support Greentime Hu
2021-04-01 6:00 ` [PATCH v4 1/6] clk: sifive: Add pcie_aux clock in prci driver for PCIe driver Greentime Hu
2021-04-01 6:00 ` [PATCH v4 2/6] clk: sifive: Use reset-simple " Greentime Hu
2021-04-01 6:00 ` [PATCH v4 3/6] MAINTAINERS: Add maintainers for SiFive FU740 " Greentime Hu
2021-04-01 6:00 ` [PATCH v4 4/6] dt-bindings: PCI: Add SiFive FU740 PCIe host controller Greentime Hu
2021-04-01 16:54 ` Rob Herring [this message]
2021-04-01 6:00 ` [PATCH v4 5/6] PCI: fu740: Add SiFive FU740 PCIe host controller driver Greentime Hu
2021-04-01 6:35 ` Krzysztof Wilczyński
2021-04-01 8:51 ` Damien Le Moal
2021-04-01 16:47 ` Rob Herring
2021-04-01 6:00 ` [PATCH v4 6/6] riscv: dts: Add PCIe support for the SiFive FU740-C000 SoC Greentime Hu
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