Re: [PATCH 4/8] dt-bindings: arm: mediatek: Add new document bindings for APU

[Rob Herring <robh@kernel.org>]

On Wed, Apr 07, 2021 at 11:28:02AM +0800, Flora Fu wrote:
> Document the apusys bindings.
> 
> Signed-off-by: Flora Fu <flora.fu@mediatek.com>
> ---
>  .../arm/mediatek/mediatek,apusys.yaml         | 56 +++++++++++++++++++
>  1 file changed, 56 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,apusys.yaml
> 
> diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,apusys.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,apusys.yaml
> new file mode 100644
> index 000000000000..dc04a46f1bad
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,apusys.yaml
> @@ -0,0 +1,56 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/arm/mediatek/mediatek,apusys.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: MediaTek APUSYS Controller
> +
> +maintainers:
> +  - Flora Fu <flora.fu@mediatek.com>
> +
> +description:
> +  The Mediatek apusys controller provides functional configurations and clocks
> +  to the system.
> +
> +properties:
> +  compatible:
> +    items:
> +      - enum:
> +          - mediatek,mt8192-apu_mbox
> +          - mediatek,mt8192-apu_conn
> +          - mediatek,mt8192-apu_vcore

s/_/-/

> +      - const: syscon
> +
> +  reg:
> +    maxItems: 1
> +
> +  '#clock-cells':
> +    const: 1
> +
> +required:
> +  - compatible
> +  - reg
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    apu_mbox: apu_mbox@19000000 {

mailbox@...? Is this a mailbox provider?

> +        compatible = "mediatek,mt8192-apu_mbox", "syscon";
> +        reg = <0x19000000 0x1000>;
> +    };
> +
> +  - |
> +    apu_conn: apu_conn@19020000 {
> +        compatible = "mediatek,mt8192-apu_conn", "syscon";
> +        reg = <0x19020000 0x1000>;
> +        #clock-cells = <1>;
> +    };
> +
> +  - |
> +    apu_vcore: apu_vcore@19029000 {
> +        compatible = "mediatek,mt8192-apu_vcore", "syscon";
> +        reg = <0x19029000 0x1000>;
> +        #clock-cells = <1>;
> +    };
> -- 
> 2.18.0
>