Re: [PATCH] dt-bindings: pinctrl: convert Broadcom Northstar to the json-schema

[Rob Herring <robh@kernel.org>]

On Wed, Apr 21, 2021 at 10:29:28AM +0200, Rafał Miłecki wrote:
> From: Rafał Miłecki <rafal@milecki.pl>
> 
> Important: this change converts the binding as it is. It includes
> dependency on undocumented CRU that must be refactored. That will be
> handled once every CRU MFD subdevice gets documented properly (including
> pinmux).
> 
> Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
> ---
>  .../bindings/pinctrl/brcm,bcm4708-pinmux.txt  | 55 -----------
>  .../bindings/pinctrl/brcm,ns-pinmux.yaml      | 98 +++++++++++++++++++
>  2 files changed, 98 insertions(+), 55 deletions(-)
>  delete mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm4708-pinmux.txt
>  create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,ns-pinmux.yaml
> 
> diff --git a/Documentation/devicetree/bindings/pinctrl/brcm,bcm4708-pinmux.txt b/Documentation/devicetree/bindings/pinctrl/brcm,bcm4708-pinmux.txt
> deleted file mode 100644
> index 8ab2d468dbdb..000000000000
> --- a/Documentation/devicetree/bindings/pinctrl/brcm,bcm4708-pinmux.txt
> +++ /dev/null
> @@ -1,55 +0,0 @@
> -Broadcom Northstar pins mux controller
> -
> -Some of Northstar SoCs's pins can be used for various purposes thanks to the mux
> -controller. This binding allows describing mux controller and listing available
> -functions. They can be referenced later by other bindings to let system
> -configure controller correctly.
> -
> -A list of pins varies across chipsets so few bindings are available.
> -
> -Node of the pinmux must be nested in the CRU (Central Resource Unit) "syscon"
> -noce.
> -
> -Required properties:
> -- compatible: must be one of:
> -	"brcm,bcm4708-pinmux"
> -	"brcm,bcm4709-pinmux"
> -	"brcm,bcm53012-pinmux"
> -- offset: offset of pin registers in the CRU block
> -
> -Functions and their groups available for all chipsets:
> -- "spi": "spi_grp"
> -- "i2c": "i2c_grp"
> -- "pwm": "pwm0_grp", "pwm1_grp", "pwm2_grp", "pwm3_grp"
> -- "uart1": "uart1_grp"
> -
> -Additionally available on BCM4709 and BCM53012:
> -- "mdio": "mdio_grp"
> -- "uart2": "uart2_grp"
> -- "sdio": "sdio_pwr_grp", "sdio_1p8v_grp"
> -
> -For documentation of subnodes see:
> -Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
> -
> -Example:
> -	dmu@1800c000 {
> -		compatible = "simple-bus";
> -		ranges = <0 0x1800c000 0x1000>;
> -		#address-cells = <1>;
> -		#size-cells = <1>;
> -
> -		cru@100 {
> -			compatible = "syscon", "simple-mfd";
> -			reg = <0x100 0x1a4>;
> -
> -			pinctrl {
> -				compatible = "brcm,bcm4708-pinmux";
> -				offset = <0xc0>;
> -
> -				spi-pins {
> -					function = "spi";
> -					groups = "spi_grp";
> -				};
> -			};
> -		};
> -	};
> diff --git a/Documentation/devicetree/bindings/pinctrl/brcm,ns-pinmux.yaml b/Documentation/devicetree/bindings/pinctrl/brcm,ns-pinmux.yaml
> new file mode 100644
> index 000000000000..1cba8f0db5c1
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pinctrl/brcm,ns-pinmux.yaml
> @@ -0,0 +1,98 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/pinctrl/brcm,ns-pinmux.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Broadcom Northstar pins mux controller
> +
> +maintainers:
> +  - Rafał Miłecki <rafal@milecki.pl>
> +
> +description:
> +  Some of Northstar SoCs's pins can be used for various purposes thanks to the
> +  mux controller. This binding allows describing mux controller and listing
> +  available functions. They can be referenced later by other bindings to let
> +  system configure controller correctly.
> +
> +  A list of pins varies across chipsets so few bindings are available.
> +
> +  Node of the pinmux must be nested in the CRU (Central Resource Unit) "syscon"
> +  node.
> +
> +properties:
> +  compatible:
> +    enum:
> +      - brcm,bcm4708-pinmux
> +      - brcm,bcm4709-pinmux
> +      - brcm,bcm53012-pinmux
> +
> +  offset:
> +    description: offset of pin registers in the CRU block
> +    $ref: /schemas/types.yaml#/definitions/uint32-array

How many entries are valid?

Really, this should have been just 'reg'.

> +
> +patternProperties:
> +  '-pins$':
> +    type: object
> +    description: pin node
> +    $ref: pinmux-node.yaml#
> +
> +    properties:
> +      function:
> +        enum: [ spi, i2c, pwm, uart1, mdio, uart2, sdio ]
> +      groups:
> +        items:
> +          enum: [ spi_grp, i2c_grp, pwm0_grp, pwm1_grp, pwm2_grp, pwm3_grp,
> +                  uart1_grp, mdio_grp, uart2_grp, sdio_pwr_grp, sdio_1p8v_grp ]

How many items are valid?

I thought I made the meta-schema require an 'items' schema to also have 
minItems/maxItems. I'll have to check...

> +
> +    required:
> +      - function
> +      - groups
> +
> +    additionalProperties: false
> +
> +allOf:
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            const: brcm,bcm4708-pinmux
> +    then:
> +      patternProperties:
> +        '-pins$':
> +          properties:
> +            function:
> +              enum: [ spi, i2c, pwm, uart1 ]
> +            groups:
> +              items:
> +                enum: [ spi_grp, i2c_grp, pwm0_grp, pwm1_grp, pwm2_grp, pwm3_grp,
> +                        uart1_grp ]
> +
> +required:
> +  - offset
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    dmu@1800c000 {
> +        compatible = "simple-bus";

No need to show this node in examples.

> +        ranges = <0 0x1800c000 0x1000>;
> +        #address-cells = <1>;
> +        #size-cells = <1>;
> +
> +        cru@100 {
> +            compatible = "syscon", "simple-mfd";

Is this the same CRU as your other patch?

> +            reg = <0x100 0x1a4>;
> +
> +            pinctrl {
> +                compatible = "brcm,bcm4708-pinmux";
> +                offset = <0xc0>;
> +
> +                spi-pins {
> +                    function = "spi";
> +                    groups = "spi_grp";
> +                };
> +            };
> +        };
> +    };
> -- 
> 2.26.2
>