From: Bjorn Helgaas <helgaas@kernel.org>
To: Leon Romanovsky <leon@kernel.org>
Cc: Greentime Hu <greentime.hu@sifive.com>,
paul.walmsley@sifive.com, hes@sifive.com, erik.danie@sifive.com,
zong.li@sifive.com, bhelgaas@google.com, robh+dt@kernel.org,
aou@eecs.berkeley.edu, mturquette@baylibre.com, sboyd@kernel.org,
lorenzo.pieralisi@arm.com, p.zabel@pengutronix.de,
alex.dewar90@gmail.com, khilman@baylibre.com,
hayashi.kunihiko@socionext.com, vidyas@nvidia.com,
jh80.chung@samsung.com, linux-pci@vger.kernel.org,
devicetree@vger.kernel.org, linux-riscv@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org
Subject: Re: [PATCH v6 1/6] clk: sifive: Add pcie_aux clock in prci driver for PCIe driver
Date: Tue, 4 May 2021 13:45:55 -0500 [thread overview]
Message-ID: <20210504184555.GA1144324@bjorn-Precision-5520> (raw)
In-Reply-To: <YJGOqaMulHzR9BZq@unreal>
On Tue, May 04, 2021 at 09:12:57PM +0300, Leon Romanovsky wrote:
> On Tue, May 04, 2021 at 11:23:31AM -0500, Bjorn Helgaas wrote:
> > There are some weird/interesting bool vs int usages nearby, though:
> >
> > "bool __is_clk_gate_enabled()" goes to some trouble to convert
> > int to bool ("return (reg_val & bit_mask) != 0;"), and then
> > kona_peri_clk_is_enabled() converts the bool back to int ("return
> > is_clk_gate_enabled(bcm_clk->ccu, gate) ? 1 : 0;").
> >
> > "int lpc32xx_clk_gate_is_enabled()" actually returns a bool that is
> > implicitly converted to int.
> >
> > Many *_is_enabled() functions return !!(...) where !! is an
> > int-to-bool conversion that is arguably unnecessary and again
> > results in an implicit conversion to int.
> >
> > I don't see any *problems* with any of these; it just seems like a
> > little more mental effort to think about all the explicit and implicit
> > conversions going on.
>
> The code is written once but read many times and I can't agree with
> your that examples given by you are not the *problems*. They clearly
> says "the API is not great and easily can be improved".
I certainly agree that it's easier for readers if the style is
consistent. I just meant I didn't see anything that's an actual bug.
Bjorn
next prev parent reply other threads:[~2021-05-04 18:45 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-04 10:59 [PATCH v6 0/6] Add SiFive FU740 PCIe host controller driver support Greentime Hu
2021-05-04 10:59 ` [PATCH v6 1/6] clk: sifive: Add pcie_aux clock in prci driver for PCIe driver Greentime Hu
2021-05-04 12:24 ` Leon Romanovsky
2021-05-04 16:23 ` Bjorn Helgaas
2021-05-04 18:12 ` Leon Romanovsky
2021-05-04 18:45 ` Bjorn Helgaas [this message]
2021-05-05 5:22 ` Leon Romanovsky
2021-05-04 10:59 ` [PATCH v6 2/6] clk: sifive: Use reset-simple " Greentime Hu
2021-05-04 10:59 ` [PATCH v6 3/6] MAINTAINERS: Add maintainers for SiFive FU740 " Greentime Hu
2021-05-04 10:59 ` [PATCH v6 4/6] dt-bindings: PCI: Add SiFive FU740 PCIe host controller Greentime Hu
2021-05-04 10:59 ` [PATCH v6 5/6] PCI: fu740: Add SiFive FU740 PCIe host controller driver Greentime Hu
2021-05-04 13:46 ` Bjorn Helgaas
2021-05-04 14:23 ` Lorenzo Pieralisi
2021-05-05 4:26 ` Greentime Hu
2021-05-05 14:37 ` Bjorn Helgaas
2021-05-04 10:59 ` [PATCH v6 6/6] riscv: dts: Add PCIe support for the SiFive FU740-C000 SoC Greentime Hu
2021-05-04 11:28 ` [PATCH v6 0/6] Add SiFive FU740 PCIe host controller driver support Lorenzo Pieralisi
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