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[80.251.214.228]) by smtp.gmail.com with ESMTPSA id a129sm3208419pfa.36.2021.05.06.17.18.23 (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Thu, 06 May 2021 17:18:25 -0700 (PDT) Date: Fri, 7 May 2021 08:18:20 +0800 From: Shawn Guo To: Rob Herring Cc: Stephen Boyd , Bjorn Andersson , Sivaprakash Murugesan , Benjamin Li , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org Subject: Re: [PATCH 2/5] dt-bindings: clock: update qcom,a53pll bindings for MSM8939 support Message-ID: <20210507001818.GB8679@dragon> References: <20210504052844.21096-1-shawn.guo@linaro.org> <20210504052844.21096-3-shawn.guo@linaro.org> <20210506202726.GA744866@robh.at.kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20210506202726.GA744866@robh.at.kernel.org> User-Agent: Mutt/1.9.4 (2018-02-28) Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Thu, May 06, 2021 at 03:27:26PM -0500, Rob Herring wrote: > On Tue, May 04, 2021 at 01:28:41PM +0800, Shawn Guo wrote: > > Update qcom,a53pll bindings for MSM8939 support: > > > > - Add optional clock-output-names property. > > - Add MSM8939 specific compatibles. > > - Add MSM8939 examples. > > > > Signed-off-by: Shawn Guo > > --- > > .../bindings/clock/qcom,a53pll.yaml | 34 +++++++++++++++++++ > > 1 file changed, 34 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/clock/qcom,a53pll.yaml b/Documentation/devicetree/bindings/clock/qcom,a53pll.yaml > > index db3d0ea6bc7a..7a410a76be2f 100644 > > --- a/Documentation/devicetree/bindings/clock/qcom,a53pll.yaml > > +++ b/Documentation/devicetree/bindings/clock/qcom,a53pll.yaml > > @@ -18,6 +18,9 @@ properties: > > enum: > > - qcom,ipq6018-a53pll > > - qcom,msm8916-a53pll > > + - qcom,msm8939-a53pll-c0 > > + - qcom,msm8939-a53pll-c1 > > + - qcom,msm8939-a53pll-cci > > These 3 have differences? Yes. They need to hook up with different frequency table as shown in patch #5. > > > > > reg: > > maxItems: 1 > > @@ -33,6 +36,9 @@ properties: > > items: > > - const: xo > > > > + clock-output-names: > > + maxItems: 1 > > + > > required: > > - compatible > > - reg > > @@ -57,3 +63,31 @@ examples: > > clocks = <&xo>; > > clock-names = "xo"; > > }; > > + #Example 3 - A53 PLLs found on MSM8939 devices > > + - | > > + a53pll_c1: clock-controller@b016000 { > > + compatible = "qcom,msm8939-a53pll-c1"; > > + reg = <0xb016000 0x40>; > > + #clock-cells = <0>; > > + clocks = <&xo_board>; > > + clock-names = "xo"; > > + clock-output-names = "a53pll_c1"; > > + }; > > + > > + a53pll_c0: clock-controller@b116000 { > > + compatible = "qcom,msm8939-a53pll-c0"; > > + reg = <0xb116000 0x40>; > > + #clock-cells = <0>; > > + clocks = <&xo_board>; > > + clock-names = "xo"; > > + clock-output-names = "a53pll_c0"; > > + }; > > + > > + a53pll_cci: clock-controller@b1d0000 { > > + compatible = "qcom,msm8939-a53pll-cci"; > > + reg = <0xb1d0000 0x40>; > > + #clock-cells = <0>; > > + clocks = <&xo_board>; > > + clock-names = "xo"; > > + clock-output-names = "a53pll_cci"; > > + }; > > Do these examples really add anything? The example was added to demonstrate that multiple A53PLL clock controllers could be found on a single SoC. But I'm happy to drop it if you think it's not so useful. Shawn