From: Rob Herring <robh@kernel.org>
To: "Peng Fan (OSS)" <peng.fan@oss.nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>,
devicetree@vger.kernel.org, festevam@gmail.com,
aisheng.dong@nxp.com, s.hauer@pengutronix.de, robh+dt@kernel.org,
linux-imx@nxp.com, kernel@pengutronix.de,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, jassisinghbrar@gmail.com,
o.rempel@pengutronix.de, shawnguo@kernel.org
Subject: Re: [PATCH 1/4] dt-bindings: mailbox: imx-mu: add i.MX8ULP MU support
Date: Mon, 10 May 2021 10:49:03 -0500 [thread overview]
Message-ID: <20210510154903.GA185393@robh.at.kernel.org> (raw)
In-Reply-To: <20210507101926.25631-2-peng.fan@oss.nxp.com>
On Fri, 07 May 2021 18:19:23 +0800, Peng Fan (OSS) wrote:
> From: Peng Fan <peng.fan@nxp.com>
>
> The register layout and bits definition of i.MX8ULP MU is different
> compared with others, let's add the compatible for the new MU.
>
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---
> Documentation/devicetree/bindings/mailbox/fsl,mu.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
Acked-by: Rob Herring <robh@kernel.org>
next prev parent reply other threads:[~2021-05-10 15:49 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-07 10:19 [PATCH 0/4] mailbox: imx: add i.MX8ULP MU support Peng Fan (OSS)
2021-05-07 10:19 ` [PATCH 1/4] dt-bindings: mailbox: imx-mu: " Peng Fan (OSS)
2021-05-10 15:49 ` Rob Herring [this message]
2021-05-07 10:19 ` [PATCH 2/4] mailbox: imx: replace the xTR/xRR array with single register Peng Fan (OSS)
2021-05-26 6:58 ` Daniel Baluta
2021-05-27 0:36 ` Peng Fan (OSS)
2021-05-07 10:19 ` [PATCH 3/4] mailbox: imx: add xSR/xCR register array Peng Fan (OSS)
2021-05-07 16:08 ` kernel test robot
2021-05-10 1:21 ` Peng Fan (OSS)
2021-05-07 10:19 ` [PATCH 4/4] mailbox: imx-mailbox: support i.MX8ULP MU Peng Fan (OSS)
2021-05-26 6:06 ` [PATCH 0/4] mailbox: imx: add i.MX8ULP MU support Peng Fan (OSS)
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