From: Rob Herring <robh@kernel.org>
To: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Cc: ilya.lipnitskiy@gmail.com, neil@brown.name,
gregkh@linuxfoundation.org, vkoul@kernel.org,
linux-phy@lists.infradead.org, robh+dt@kernel.org, kishon@ti.com,
devicetree@vger.kernel.org, linux-staging@lists.linux.dev
Subject: Re: [PATCH RESEND v2 2/6] dt-bindings: phy: mediatek,mt7621-pci-phy: add clock entries
Date: Mon, 10 May 2021 11:01:50 -0500 [thread overview]
Message-ID: <20210510160150.GA202555@robh.at.kernel.org> (raw)
In-Reply-To: <20210508070930.5290-3-sergio.paracuellos@gmail.com>
On Sat, 08 May 2021 09:09:26 +0200, Sergio Paracuellos wrote:
> MT7621 SoC clock driver has already mainlined in
> 'commit 48df7a26f470 ("clk: ralink: add clock driver for mt7621 SoC")'
> Hence update schema with the add of the entries related to
> clock. Since until now things were not properly being done
> we mark also 'clock' as required in the binding since this
> will be now the only way to properly retrieve frequency to be
> able to make a correct configuration of the PCIe phy registers.
>
> Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
> ---
> .../devicetree/bindings/phy/mediatek,mt7621-pci-phy.yaml | 5 +++++
> 1 file changed, 5 insertions(+)
>
Acked-by: Rob Herring <robh@kernel.org>
next prev parent reply other threads:[~2021-05-10 16:01 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-08 7:09 [PATCH RESEND v2 0/6] phy: ralink: mt7621-pci-phy: some improvements Sergio Paracuellos
2021-05-08 7:09 ` [PATCH RESEND v2 1/6] staging: mt7621-dts: use clock in pci phy nodes Sergio Paracuellos
2021-05-08 7:09 ` [PATCH RESEND v2 2/6] dt-bindings: phy: mediatek,mt7621-pci-phy: add clock entries Sergio Paracuellos
2021-05-10 16:01 ` Rob Herring [this message]
2021-05-08 7:09 ` [PATCH RESEND v2 3/6] phy: ralink: phy-mt7621-pci: use kernel clock APIS Sergio Paracuellos
2021-05-08 7:09 ` [PATCH RESEND v2 4/6] phy: ralink: Kconfig: enable COMPILE_TEST on mt7621-pci-phy driver Sergio Paracuellos
2021-05-08 7:09 ` [PATCH RESEND v2 5/6] phy: ralink: Kconfig: convert mt7621-pci-phy into 'bool' Sergio Paracuellos
2021-05-08 7:09 ` [PATCH RESEND v2 6/6] phy: ralink: phy-mt7621-pci: properly print pointer address Sergio Paracuellos
2021-05-14 10:46 ` [PATCH RESEND v2 0/6] phy: ralink: mt7621-pci-phy: some improvements Vinod Koul
2021-05-14 11:19 ` Sergio Paracuellos
2021-05-14 11:22 ` Greg KH
2021-05-14 11:30 ` Sergio Paracuellos
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210510160150.GA202555@robh.at.kernel.org \
--to=robh@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=gregkh@linuxfoundation.org \
--cc=ilya.lipnitskiy@gmail.com \
--cc=kishon@ti.com \
--cc=linux-phy@lists.infradead.org \
--cc=linux-staging@lists.linux.dev \
--cc=neil@brown.name \
--cc=robh+dt@kernel.org \
--cc=sergio.paracuellos@gmail.com \
--cc=vkoul@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).