From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.9 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE, USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 46760C43460 for ; Wed, 12 May 2021 20:55:07 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 12424613C0 for ; Wed, 12 May 2021 20:55:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241120AbhELUzC (ORCPT ); Wed, 12 May 2021 16:55:02 -0400 Received: from fllv0015.ext.ti.com ([198.47.19.141]:49134 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1379706AbhELTlj (ORCPT ); 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Wed, 12 May 2021 14:40:23 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 14CJeMA5084821; Wed, 12 May 2021 14:40:22 -0500 Date: Wed, 12 May 2021 14:40:22 -0500 From: Nishanth Menon To: Kishon Vijay Abraham I CC: Tero Kristo , Rob Herring , , , , Lokesh Vutla , Subject: Re: [PATCH 4/5] arm64: dts: ti: k3-am642-sk: Enable USB Super-Speed HOST port Message-ID: <20210512194022.27h53llpxmvg3eoe@splurge> References: <20210512150107.26793-1-kishon@ti.com> <20210512150107.26793-5-kishon@ti.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <20210512150107.26793-5-kishon@ti.com> User-Agent: NeoMutt/20171215 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 20:31-20210512, Kishon Vijay Abraham I wrote: > Enable USB Super-Speed HOST port. > > Signed-off-by: Kishon Vijay Abraham I > Signed-off-by: Aswath Govindraju > --- > arch/arm64/boot/dts/ti/k3-am642-sk.dts | 39 ++++++++++++++++++++++++++ > 1 file changed, 39 insertions(+) > > diff --git a/arch/arm64/boot/dts/ti/k3-am642-sk.dts b/arch/arm64/boot/dts/ti/k3-am642-sk.dts > index 8424cd071955..056c1b2df559 100644 > --- a/arch/arm64/boot/dts/ti/k3-am642-sk.dts > +++ b/arch/arm64/boot/dts/ti/k3-am642-sk.dts > @@ -5,6 +5,8 @@ > > /dts-v1/; > > +#include > +#include > #include > #include > #include "k3-am642.dtsi" > @@ -85,6 +87,12 @@ > >; > }; > > + main_usb0_pins_default: main-usb0-pins-default { > + pinctrl-single,pins = < > + AM64X_IOPAD(0x02a8, PIN_OUTPUT, 0) /* (E19) USB0_DRVVBUS */ > + >; > + }; > + > main_i2c1_pins_default: main-i2c1-pins-default { > pinctrl-single,pins = < > AM64X_IOPAD(0x0268, PIN_INPUT_PULLUP, 0) /* (C18) I2C1_SCL */ > @@ -235,6 +243,37 @@ > disable-wp; > }; > > +&serdes_ln_ctrl { > + idle-states = ; > +}; > + > +&serdes_wiz0 { > + status = "okay"; not sure I understand why default of okay needs to be explicitly stated as okay in board dts. > +}; > + > +&serdes0 { > + serdes0_usb_link: phy@0 { > + reg = <0>; > + cdns,num-lanes = <1>; > + #phy-cells = <0>; > + cdns,phy-type = ; > + resets = <&serdes_wiz0 1>; > + }; > +}; > + > +&usbss0 { > + ti,vbus-divider; > +}; > + > +&usb0 { > + dr_mode = "host"; > + maximum-speed = "super-speed"; > + pinctrl-names = "default"; > + pinctrl-0 = <&main_usb0_pins_default>; > + phys = <&serdes0_usb_link>; > + phy-names = "cdns3,usb3-phy"; > +}; > + > &cpsw3g { > pinctrl-names = "default"; > pinctrl-0 = <&mdio1_pins_default > -- > 2.17.1 > -- Regards, Nishanth Menon Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D