From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B9410C433B4 for ; Wed, 19 May 2021 15:00:16 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 8C0456135C for ; Wed, 19 May 2021 15:00:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235106AbhESPBf (ORCPT ); Wed, 19 May 2021 11:01:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48660 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229808AbhESPBe (ORCPT ); Wed, 19 May 2021 11:01:34 -0400 Received: from mail-wr1-x433.google.com (mail-wr1-x433.google.com [IPv6:2a00:1450:4864:20::433]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A0FE1C061760 for ; Wed, 19 May 2021 08:00:14 -0700 (PDT) Received: by mail-wr1-x433.google.com with SMTP id q5so14363233wrs.4 for ; Wed, 19 May 2021 08:00:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:content-transfer-encoding:in-reply-to; bh=dj8HjSEltSQ35S7lmqYwXgvlOZsZ7TUYX+opBuqrwQ0=; b=R1n+hnWZMqTitIFXwbfVQ+YhfCV4/jiA4aTdTrIIWZMidDFv/lwN+44qBOrmGWbzIs 1+6+zj/Gb5hgDcOPLWc8/7yDb2pW+aBmkMgWKa0iTwQ6LuxH1yvpSa4XuF3rdQw8B/cX gcd4UXyolgpMBpMnvVO8rSN4z2247vhNL99/Tfqu5NVEmQ49SUOd1y+/GrY9yQpCAVQ5 G37f8Y5spuR5WdglPbdsBnzYLMOo3lcsNGYodYUgUJxmhBmGgV/4KdklpBrz/mKr+kmL dA6eWMU3/D4sX2HqD6zljX7/bOpOF8Qx2N2jc6h3lEIeIczsnyCkb4fNXCzwNXZ5DAIY Nj8Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:content-transfer-encoding :in-reply-to; bh=dj8HjSEltSQ35S7lmqYwXgvlOZsZ7TUYX+opBuqrwQ0=; b=m6aEdCAC1Ag1rklvMCJWLyVRwAUY1dzxFEtEo+4n9ceQi3AIT8G4jP91PhIFcpcWJH p5omduFc+G36FWCI+TEOunHiovoNPaPWvhyPj14fnoux+OFDdoL2hY8Ogi/e62OyDOsl LPgTenFE1ZnOx9txiOvhuirjhXpbhoVPl64HQ5ZrCK+BfDy59G9R3d3pxU9JhJsj3k8O 54mQQim6YPkOVIwUrKqJFT7LEnC51lwOipzpuLDmofaPPYHN5CK//EczZqzgA0bhCAqr 48pIZIR8BM406HzE0AvZWMAqyoy+bSFqjyJTvgVq5xP2N3b24LeA7ZM42gRHz9APAwKD gJRg== X-Gm-Message-State: AOAM533G13qRtFp82sfKHPjOFhrWmsFtvJVyybscpGYsoSGdebudcAVq cUrzRDhqG9Og9XF9zY/t9bXPuA== X-Google-Smtp-Source: ABdhPJwVqW1ph9IN2a5+C7Xz683XbVd7eoenA9J/Cjz971MWwgqtmzEOqzq7xSc3x8z11Kn3/z5CWg== X-Received: by 2002:a5d:618f:: with SMTP id j15mr14795053wru.273.1621436413251; Wed, 19 May 2021 08:00:13 -0700 (PDT) Received: from dell ([91.110.221.215]) by smtp.gmail.com with ESMTPSA id x2sm11239703wmj.3.2021.05.19.08.00.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 May 2021 08:00:12 -0700 (PDT) Date: Wed, 19 May 2021 16:00:10 +0100 From: Lee Jones To: Rob Herring Cc: devicetree@vger.kernel.org, Peter Rosin , Wolfram Sang , linux-kernel@vger.kernel.org, Alexandre Belloni , Jacopo Mondi , Kieran Bingham , Kishon Vijay Abraham I , Laurent Pinchart , Niklas =?iso-8859-1?Q?S=F6derlund?= , Roger Quadros , Jonathan Cameron Subject: Re: [PATCH 1/6] dt-bindings: mfd: ti,j721e-system-controller: Fix mux node errors Message-ID: <20210519150010.GJ2549456@dell> References: <20210518232858.1535403-1-robh@kernel.org> <20210518232858.1535403-2-robh@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20210518232858.1535403-2-robh@kernel.org> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Tue, 18 May 2021, Rob Herring wrote: > The ti,j721e-system-controller binding does not follow the standard mux > controller node name 'mux-controller' and the example is incomplete. Fix > these to avoid schema errors before the mux controller binding is > converted to schema. > > Cc: Lee Jones > Cc: Kishon Vijay Abraham I > Cc: Roger Quadros Would one of the original authors be kind enough to review please? > Signed-off-by: Rob Herring > --- > .../mfd/ti,j721e-system-controller.yaml | 19 +++++++++++++------ > 1 file changed, 13 insertions(+), 6 deletions(-) > > diff --git a/Documentation/devicetree/bindings/mfd/ti,j721e-system-controller.yaml b/Documentation/devicetree/bindings/mfd/ti,j721e-system-controller.yaml > index 19fcf59fd2fe..272832e9f8f2 100644 > --- a/Documentation/devicetree/bindings/mfd/ti,j721e-system-controller.yaml > +++ b/Documentation/devicetree/bindings/mfd/ti,j721e-system-controller.yaml > @@ -43,12 +43,10 @@ properties: > > patternProperties: > # Optional children > - "^serdes-ln-ctrl@[0-9a-f]+$": > + "^mux-controller@[0-9a-f]+$": > type: object > - description: | > - This is the SERDES lane control mux. It should follow the bindings > - specified in > - Documentation/devicetree/bindings/mux/reg-mux.txt > + description: > + This is the SERDES lane control mux. > > required: > - compatible > @@ -68,9 +66,18 @@ examples: > #size-cells = <1>; > ranges; > > - serdes_ln_ctrl: serdes-ln-ctrl@4080 { > + serdes_ln_ctrl: mux-controller@4080 { > compatible = "mmio-mux"; > reg = <0x00004080 0x50>; > + > + #mux-control-cells = <1>; > + mux-reg-masks = > + <0x4080 0x3>, <0x4084 0x3>, /* SERDES0 lane0/1 select */ > + <0x4090 0x3>, <0x4094 0x3>, /* SERDES1 lane0/1 select */ > + <0x40a0 0x3>, <0x40a4 0x3>, /* SERDES2 lane0/1 select */ > + <0x40b0 0x3>, <0x40b4 0x3>, /* SERDES3 lane0/1 select */ > + <0x40c0 0x3>, <0x40c4 0x3>, <0x40c8 0x3>, <0x40cc 0x3>; > + /* SERDES4 lane0/1/2/3 select */ > }; > }; > ... -- Lee Jones [李琼斯] Senior Technical Lead - Developer Services Linaro.org │ Open source software for Arm SoCs Follow Linaro: Facebook | Twitter | Blog