From: Rob Herring <robh@kernel.org>
To: Linus Walleij <linus.walleij@linaro.org>
Cc: linux-crypto@vger.kernel.org,
Herbert Xu <herbert@gondor.apana.org.au>,
"David S . Miller" <davem@davemloft.net>,
Corentin Labbe <clabbe@baylibre.com>,
linux-arm-kernel@lists.infradead.org,
Imre Kaloz <kaloz@openwrt.org>,
Krzysztof Halasa <khalasa@piap.pl>, Arnd Bergmann <arnd@arndb.de>,
devicetree@vger.kernel.org
Subject: Re: [PATCH 2/3 v2] crypto: ixp4xx: Add DT bindings
Date: Fri, 21 May 2021 12:27:49 -0500 [thread overview]
Message-ID: <20210521172749.GA33272@robh.at.kernel.org> (raw)
In-Reply-To: <20210520223020.731925-1-linus.walleij@linaro.org>
On Fri, May 21, 2021 at 12:30:20AM +0200, Linus Walleij wrote:
> This adds device tree bindings for the ixp4xx crypto engine.
>
> Cc: Corentin Labbe <clabbe@baylibre.com>
> Cc: devicetree@vger.kernel.org
> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
> ---
> ChangeLog v1->v2:
> - Drop the phandle to self, just add an NPE instance number
> instead.
> - Add the crypto node to the NPE binding.
> - Move the example over to the NPE binding where it appears
> in context.
> ---
> .../bindings/crypto/intel,ixp4xx-crypto.yaml | 46 +++++++++++++++++++
> ...ntel,ixp4xx-network-processing-engine.yaml | 13 +++++-
> 2 files changed, 58 insertions(+), 1 deletion(-)
> create mode 100644 Documentation/devicetree/bindings/crypto/intel,ixp4xx-crypto.yaml
>
> diff --git a/Documentation/devicetree/bindings/crypto/intel,ixp4xx-crypto.yaml b/Documentation/devicetree/bindings/crypto/intel,ixp4xx-crypto.yaml
> new file mode 100644
> index 000000000000..79e9d23be1f4
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/crypto/intel,ixp4xx-crypto.yaml
> @@ -0,0 +1,46 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +# Copyright 2018 Linaro Ltd.
> +%YAML 1.2
> +---
> +$id: "http://devicetree.org/schemas/crypto/intel,ixp4xx-crypto.yaml#"
> +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
> +
> +title: Intel IXP4xx cryptographic engine
> +
> +maintainers:
> + - Linus Walleij <linus.walleij@linaro.org>
> +
> +description: |
> + The Intel IXP4xx cryptographic engine makes use of the IXP4xx NPE
> + (Network Processing Engine). Since it is not a device on its own
> + it is defined as a subnode of the NPE, if crypto support is
> + available on the platform.
> +
> +properties:
> + compatible:
> + const: intel,ixp4xx-crypto
> +
> + intel,npe:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + minimum: 0
> + maximum: 3
> + description: phandle to the NPE this ethernet instance is using
Not a phandle now.
> + and the instance to use in the second cell
Maybe 'reg' works here? You can only have 1 thing you address though if
you use reg here.
How are other NPE instances used? Are you going to need to have a
reference to them?
> +
> + queue-rx:
> + $ref: /schemas/types.yaml#/definitions/phandle-array
> + maxItems: 1
> + description: phandle to the RX queue on the NPE
Plus a cell value. What's it for?
> +
> + queue-txready:
> + $ref: /schemas/types.yaml#/definitions/phandle-array
> + maxItems: 1
> + description: phandle to the TX READY queue on the NPE
And here.
> +
> +required:
> + - compatible
> + - intel,npe
> + - queue-rx
> + - queue-txready
> +
> +additionalProperties: false
> diff --git a/Documentation/devicetree/bindings/firmware/intel,ixp4xx-network-processing-engine.yaml b/Documentation/devicetree/bindings/firmware/intel,ixp4xx-network-processing-engine.yaml
> index 1bd2870c3a9c..add46ae6c461 100644
> --- a/Documentation/devicetree/bindings/firmware/intel,ixp4xx-network-processing-engine.yaml
> +++ b/Documentation/devicetree/bindings/firmware/intel,ixp4xx-network-processing-engine.yaml
> @@ -30,6 +30,10 @@ properties:
> - description: NPE1 register range
> - description: NPE2 register range
>
> + crypto:
> + type: object
> + description: optional node for the embedded crypto engine
$ref: /schemas/crypto/intel,ixp4xx-crypto.yaml#
> +
> required:
> - compatible
> - reg
> @@ -38,8 +42,15 @@ additionalProperties: false
>
> examples:
> - |
> - npe@c8006000 {
> + npe: npe@c8006000 {
> compatible = "intel,ixp4xx-network-processing-engine";
> reg = <0xc8006000 0x1000>, <0xc8007000 0x1000>, <0xc8008000 0x1000>;
> +
> + crypto {
> + compatible = "intel,ixp4xx-crypto";
> + intel,npe = <2>;
> + queue-rx = <&qmgr 30>;
> + queue-txready = <&qmgr 29>;
> + };
> };
> ...
> --
> 2.31.1
>
next prev parent reply other threads:[~2021-05-21 17:27 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-20 22:30 [PATCH 2/3 v2] crypto: ixp4xx: Add DT bindings Linus Walleij
2021-05-21 17:27 ` Rob Herring [this message]
2021-05-22 16:26 ` Linus Walleij
2021-05-24 13:47 ` Rob Herring
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210521172749.GA33272@robh.at.kernel.org \
--to=robh@kernel.org \
--cc=arnd@arndb.de \
--cc=clabbe@baylibre.com \
--cc=davem@davemloft.net \
--cc=devicetree@vger.kernel.org \
--cc=herbert@gondor.apana.org.au \
--cc=kaloz@openwrt.org \
--cc=khalasa@piap.pl \
--cc=linus.walleij@linaro.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-crypto@vger.kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).