From: Dmitry Osipenko <digetx@gmail.com>
To: Thierry Reding <thierry.reding@gmail.com>,
Jonathan Hunter <jonathanh@nvidia.com>,
Zhang Rui <rui.zhang@intel.com>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Amit Kucheria <amitk@kernel.org>,
Andreas Westman Dorcsak <hedmoo@yahoo.com>,
Maxim Schwalm <maxim.schwalm@gmail.com>,
Svyatoslav Ryhel <clamor95@gmail.com>,
Ihor Didenko <tailormoon@rambler.ru>,
Ion Agorria <ion@agorria.com>,
Matt Merhar <mattmerhar@protonmail.com>,
Peter Geis <pgwipeout@gmail.com>
Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-tegra@vger.kernel.org, linux-pm@vger.kernel.org
Subject: [PATCH v3 7/7] ARM: tegra: Add SoC thermal sensor to Tegra30 device-trees
Date: Sat, 29 May 2021 20:09:55 +0300 [thread overview]
Message-ID: <20210529170955.32574-8-digetx@gmail.com> (raw)
In-Reply-To: <20210529170955.32574-1-digetx@gmail.com>
Add the on-chip SoC thermal sensor to Tegra30 device-trees. Now CPU
temperature reporting and thermal throttling is available on all Tegra30
devices universally.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
---
arch/arm/boot/dts/tegra30-ouya.dts | 16 +++++
arch/arm/boot/dts/tegra30.dtsi | 93 ++++++++++++++++++++++++++++--
2 files changed, 105 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/tegra30-ouya.dts b/arch/arm/boot/dts/tegra30-ouya.dts
index e767ac227a81..d792ce5c64c0 100644
--- a/arch/arm/boot/dts/tegra30-ouya.dts
+++ b/arch/arm/boot/dts/tegra30-ouya.dts
@@ -468,6 +468,22 @@ map1 {
};
};
};
+
+ tsensor-channel0 {
+ trips {
+ dvfs-alert {
+ temperature = <70000>;
+ };
+
+ cpu-div2-throttle {
+ temperature = <75000>;
+ };
+
+ soc-critical {
+ temperature = <90000>;
+ };
+ };
+ };
};
vdd_12v_in: vdd_12v_in {
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
index c577c191be4b..6becbadef210 100644
--- a/arch/arm/boot/dts/tegra30.dtsi
+++ b/arch/arm/boot/dts/tegra30.dtsi
@@ -5,6 +5,7 @@
#include <dt-bindings/pinctrl/pinctrl-tegra.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/soc/tegra-pmc.h>
+#include <dt-bindings/thermal/thermal.h>
#include "tegra30-peripherals-opp.dtsi"
@@ -800,6 +801,21 @@ fuse@7000f800 {
reset-names = "fuse";
};
+ tsensor: tsensor@70014000 {
+ compatible = "nvidia,tegra30-tsensor";
+ reg = <0x70014000 0x500>;
+ interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&tegra_car TEGRA30_CLK_TSENSOR>;
+ resets = <&tegra_car TEGRA30_CLK_TSENSOR>;
+
+ assigned-clocks = <&tegra_car TEGRA30_CLK_TSENSOR>;
+ assigned-clock-parents = <&tegra_car TEGRA30_CLK_CLK_M>;
+ assigned-clock-rates = <500000>;
+
+ #thermal-sensor-cells = <1>;
+ #cooling-cells = <2>;
+ };
+
hda@70030000 {
compatible = "nvidia,tegra30-hda";
reg = <0x70030000 0x10000>;
@@ -1062,32 +1078,36 @@ cpus {
#address-cells = <1>;
#size-cells = <0>;
- cpu@0 {
+ cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0>;
clocks = <&tegra_car TEGRA30_CLK_CCLK_G>;
+ #cooling-cells = <2>;
};
- cpu@1 {
+ cpu1: cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <1>;
clocks = <&tegra_car TEGRA30_CLK_CCLK_G>;
+ #cooling-cells = <2>;
};
- cpu@2 {
+ cpu2: cpu@2 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <2>;
clocks = <&tegra_car TEGRA30_CLK_CCLK_G>;
+ #cooling-cells = <2>;
};
- cpu@3 {
+ cpu3: cpu@3 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <3>;
clocks = <&tegra_car TEGRA30_CLK_CCLK_G>;
+ #cooling-cells = <2>;
};
};
@@ -1102,4 +1122,69 @@ pmu {
<&{/cpus/cpu@2}>,
<&{/cpus/cpu@3}>;
};
+
+ thermal-zones {
+ tsensor-channel0 {
+ polling-delay-passive = <1000>; /* milliseconds */
+ polling-delay = <5000>; /* milliseconds */
+
+ thermal-sensors = <&tsensor 0>;
+
+ trips {
+ level1_trip: dvfs-alert {
+ /* throttle at 67C until temperature drops to 66.8C */
+ temperature = <67000>;
+ hysteresis = <200>;
+ type = "passive";
+ };
+
+ level2_trip: cpu-div2-throttle {
+ /* hardware CPU x2 freq throttle at 70C */
+ temperature = <70000>;
+ hysteresis = <200>;
+ type = "hot";
+ };
+
+ soc-critical {
+ /* hardware shut down at 80C */
+ temperature = <80000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ map0 {
+ trip = <&level1_trip>;
+ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&actmon THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+
+ map1 {
+ trip = <&level2_trip>;
+ cooling-device = <&tsensor THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
+ };
+
+ tsensor-channel1 {
+ status = "disabled";
+
+ polling-delay-passive = <1000>; /* milliseconds */
+ polling-delay = <0>; /* milliseconds */
+
+ thermal-sensors = <&tsensor 1>;
+
+ trips {
+ dvfs-alert {
+ temperature = <80000>;
+ hysteresis = <200>;
+ type = "passive";
+ };
+ };
+ };
+ };
};
--
2.30.2
prev parent reply other threads:[~2021-05-29 17:10 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-29 17:09 [PATCH v3 0/7] Add driver for NVIDIA Tegra30 SoC Thermal sensor Dmitry Osipenko
2021-05-29 17:09 ` [PATCH v3 1/7] dt-bindings: thermal: Add binding for Tegra30 thermal sensor Dmitry Osipenko
2021-05-29 17:09 ` [PATCH v3 2/7] thermal: thermal_of: Stop zone device before unregistering it Dmitry Osipenko
2021-05-29 17:09 ` [PATCH v3 3/7] thermal/core: Export thermal_cooling_device_stats_update() Dmitry Osipenko
2021-05-29 17:09 ` [PATCH v3 4/7] thermal/drivers/tegra: Add driver for Tegra30 thermal sensor Dmitry Osipenko
2021-05-31 12:51 ` Thierry Reding
2021-06-15 10:03 ` Daniel Lezcano
2021-06-15 10:26 ` Viresh Kumar
2021-06-15 13:01 ` Dmitry Osipenko
2021-06-15 16:18 ` Daniel Lezcano
2021-06-15 19:32 ` Dmitry Osipenko
2021-06-16 2:50 ` Thara Gopinath
2021-06-16 10:47 ` Dmitry Osipenko
2021-06-16 14:36 ` Thara Gopinath
2021-06-16 8:03 ` Viresh Kumar
2021-06-16 8:30 ` Vincent Guittot
2021-06-16 8:39 ` Dmitry Osipenko
2021-06-16 8:51 ` Vincent Guittot
2021-06-16 10:49 ` Dmitry Osipenko
2021-05-29 17:09 ` [PATCH v3 5/7] ARM: tegra_defconfig: Enable CONFIG_TEGRA30_TSENSOR Dmitry Osipenko
2021-05-29 17:09 ` [PATCH v3 6/7] ARM: multi_v7_defconfig: " Dmitry Osipenko
2021-05-29 17:09 ` Dmitry Osipenko [this message]
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