From: Dmitry Osipenko <digetx@gmail.com>
To: "Thierry Reding" <thierry.reding@gmail.com>,
"Jonathan Hunter" <jonathanh@nvidia.com>,
"Michał Mirosław" <mirq-linux@rere.qmqm.pl>,
"Nikola Milosavljević" <mnidza@outlook.com>,
"Ulf Hansson" <ulf.hansson@linaro.org>,
"Peter Geis" <pgwipeout@gmail.com>,
"Nicolas Chauvet" <kwizart@gmail.com>,
"Viresh Kumar" <vireshk@kernel.org>,
"Stephen Boyd" <sboyd@kernel.org>,
"Matt Merhar" <mattmerhar@protonmail.com>,
"Paul Fertser" <fercerpav@gmail.com>,
"Mark Brown" <broonie@kernel.org>,
"Liam Girdwood" <lgirdwood@gmail.com>,
"Krzysztof Kozlowski" <krzysztof.kozlowski@canonical.com>,
"Mikko Perttunen" <mperttunen@nvidia.com>
Cc: linux-kernel@vger.kernel.org, linux-tegra@vger.kernel.org,
devicetree@vger.kernel.org, linux-pm@vger.kernel.org,
Nathan Chancellor <nathan@kernel.org>,
linux-clk@vger.kernel.org
Subject: [PATCH v6 13/14] soc/tegra: pmc: Add driver state syncing
Date: Tue, 1 Jun 2021 05:31:18 +0300 [thread overview]
Message-ID: <20210601023119.22044-14-digetx@gmail.com> (raw)
In-Reply-To: <20210601023119.22044-1-digetx@gmail.com>
Add driver state syncing that is invoked once all PMC consumers are
attached and ready. The consumers are the power domain clients.
The synchronization callback is invoked once all client drivers are
probed, the driver core handles this for us. This callback informs
PMC driver that all voltage votes are initialized by each PD client
and it's safe to begin voltage scaling of the core power domain.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
---
drivers/soc/tegra/pmc.c | 23 +++++++++++++++++++++++
include/soc/tegra/pmc.h | 7 +++++++
2 files changed, 30 insertions(+)
diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c
index 7e07910b9b88..d8eee285fd58 100644
--- a/drivers/soc/tegra/pmc.c
+++ b/drivers/soc/tegra/pmc.c
@@ -429,6 +429,8 @@ struct tegra_pmc {
struct irq_chip irq;
struct notifier_block clk_nb;
+
+ bool core_domain_state_synced;
};
static struct tegra_pmc *pmc = &(struct tegra_pmc) {
@@ -1298,6 +1300,11 @@ static int tegra_powergate_add(struct tegra_pmc *pmc, struct device_node *np)
return err;
}
+bool tegra_pmc_core_domain_state_synced(void)
+{
+ return pmc->core_domain_state_synced;
+}
+
static int
tegra_pmc_core_pd_set_performance_state(struct generic_pm_domain *genpd,
unsigned int level)
@@ -3787,6 +3794,21 @@ static const struct of_device_id tegra_pmc_match[] = {
{ }
};
+static void tegra_pmc_sync_state(struct device *dev)
+{
+ int err;
+
+ pmc->core_domain_state_synced = true;
+
+ /* this is a no-op if core regulator isn't used */
+ mutex_lock(&pmc->powergates_lock);
+ err = dev_pm_opp_sync_regulators(dev);
+ mutex_unlock(&pmc->powergates_lock);
+
+ if (err)
+ dev_err(dev, "failed to sync regulators: %d\n", err);
+}
+
static struct platform_driver tegra_pmc_driver = {
.driver = {
.name = "tegra-pmc",
@@ -3795,6 +3817,7 @@ static struct platform_driver tegra_pmc_driver = {
#if defined(CONFIG_PM_SLEEP) && defined(CONFIG_ARM)
.pm = &tegra_pmc_pm_ops,
#endif
+ .sync_state = tegra_pmc_sync_state,
},
.probe = tegra_pmc_probe,
};
diff --git a/include/soc/tegra/pmc.h b/include/soc/tegra/pmc.h
index 361cb64246f7..d186bccd125d 100644
--- a/include/soc/tegra/pmc.h
+++ b/include/soc/tegra/pmc.h
@@ -171,6 +171,8 @@ int tegra_io_rail_power_off(unsigned int id);
void tegra_pmc_set_suspend_mode(enum tegra_suspend_mode mode);
void tegra_pmc_enter_suspend_mode(enum tegra_suspend_mode mode);
+bool tegra_pmc_core_domain_state_synced(void);
+
#else
static inline int tegra_powergate_power_on(unsigned int id)
{
@@ -227,6 +229,11 @@ static inline void tegra_pmc_enter_suspend_mode(enum tegra_suspend_mode mode)
{
}
+static inline bool tegra_pmc_core_domain_state_synced(void)
+{
+ return false;
+}
+
#endif /* CONFIG_SOC_TEGRA_PMC */
#if defined(CONFIG_SOC_TEGRA_PMC) && defined(CONFIG_PM_SLEEP)
--
2.30.2
next prev parent reply other threads:[~2021-06-01 2:33 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-01 2:31 [PATCH v6 00/14] NVIDIA Tegra memory and power management changes for 5.14 Dmitry Osipenko
2021-06-01 2:31 ` [PATCH v6 01/14] regulator: core: Add regulator_sync_voltage_rdev() Dmitry Osipenko
2021-06-01 2:31 ` [PATCH v6 02/14] soc/tegra: regulators: Bump voltages on system reboot Dmitry Osipenko
2021-06-01 2:31 ` [PATCH v6 03/14] soc/tegra: Add stub for soc_is_tegra() Dmitry Osipenko
2021-06-01 2:31 ` [PATCH v6 04/14] soc/tegra: Add devm_tegra_core_dev_init_opp_table() Dmitry Osipenko
2021-06-01 2:31 ` [PATCH v6 05/14] soc/tegra: fuse: Add stubs needed for compile-testing Dmitry Osipenko
2021-06-01 2:31 ` [PATCH v6 06/14] clk: tegra: " Dmitry Osipenko
2021-06-01 2:31 ` [PATCH v6 07/14] memory: tegra: Fix compilation warnings on 64bit platforms Dmitry Osipenko
2021-06-01 2:31 ` [PATCH v6 08/14] memory: tegra: Enable compile testing for all drivers Dmitry Osipenko
2021-06-07 6:01 ` Krzysztof Kozlowski
2021-06-07 13:36 ` Thierry Reding
2021-06-07 13:37 ` Dmitry Osipenko
2021-06-07 14:01 ` Dmitry Osipenko
2021-06-07 14:19 ` Thierry Reding
2021-06-07 14:42 ` Krzysztof Kozlowski
2021-06-08 15:18 ` Dmitry Osipenko
2021-06-01 2:31 ` [PATCH v6 09/14] memory: tegra20-emc: Use devm_tegra_core_dev_init_opp_table() Dmitry Osipenko
2021-06-01 2:31 ` [PATCH v6 10/14] memory: tegra30-emc: " Dmitry Osipenko
2021-06-01 2:31 ` [PATCH v6 11/14] dt-bindings: soc: tegra-pmc: Document core power domain Dmitry Osipenko
2021-06-01 2:31 ` [PATCH v6 12/14] soc/tegra: pmc: Add " Dmitry Osipenko
2021-06-01 2:31 ` Dmitry Osipenko [this message]
2021-06-01 2:31 ` [PATCH v6 14/14] soc/tegra: regulators: Support core domain state syncing Dmitry Osipenko
2021-06-01 11:27 ` [PATCH v6 00/14] NVIDIA Tegra memory and power management changes for 5.14 Thierry Reding
2021-06-01 15:51 ` Dmitry Osipenko
2021-06-01 17:10 ` Thierry Reding
2021-06-01 18:00 ` Dmitry Osipenko
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