From: Srinivasa Rao Mandadapu <srivasam@codeaurora.org>
To: agross@kernel.org, bjorn.andersson@linaro.org,
lgirdwood@gmail.com, broonie@kernel.org, robh+dt@kernel.org,
plai@codeaurora.org, bgoswami@codeaurora.org, perex@perex.cz,
tiwai@suse.com, srinivas.kandagatla@linaro.org,
rohitkr@codeaurora.org, linux-arm-msm@vger.kernel.org,
alsa-devel@alsa-project.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, swboyd@chromium.org,
judyhsiao@chromium.org
Cc: Srinivasa Rao Mandadapu <srivasam@codeaurora.org>
Subject: [PATCH] ASoC: qcom: Fix for DMA interrupt clear reg overwriting
Date: Thu, 3 Jun 2021 10:35:30 +0530 [thread overview]
Message-ID: <20210603050530.15898-1-srivasam@codeaurora.org> (raw)
This patch fixes the DMA interrupt registers overwriting
issue in lpass platform interrupt handler.
Signed-off-by: Srinivasa Rao Mandadapu <srivasam@codeaurora.org>
---
sound/soc/qcom/lpass-platform.c | 17 +++++++++++------
1 file changed, 11 insertions(+), 6 deletions(-)
diff --git a/sound/soc/qcom/lpass-platform.c b/sound/soc/qcom/lpass-platform.c
index 0df9481ea4c6..e02caa121fa4 100644
--- a/sound/soc/qcom/lpass-platform.c
+++ b/sound/soc/qcom/lpass-platform.c
@@ -526,7 +526,7 @@ static int lpass_platform_pcmops_trigger(struct snd_soc_component *component,
return -EINVAL;
}
- ret = regmap_write(map, reg_irqclr, val_irqclr);
+ ret = regmap_update_bits(map, reg_irqclr, val_irqclr, val_irqclr);
if (ret) {
dev_err(soc_runtime->dev, "error writing to irqclear reg: %d\n", ret);
return ret;
@@ -650,7 +650,7 @@ static irqreturn_t lpass_dma_interrupt_handler(
struct lpass_variant *v = drvdata->variant;
irqreturn_t ret = IRQ_NONE;
int rv;
- unsigned int reg = 0, val = 0;
+ unsigned int reg = 0, val = 0, val_clr = 0, val_mask = 0;
struct regmap *map;
unsigned int dai_id = cpu_dai->driver->id;
@@ -676,8 +676,9 @@ static irqreturn_t lpass_dma_interrupt_handler(
return -EINVAL;
}
if (interrupts & LPAIF_IRQ_PER(chan)) {
-
- rv = regmap_write(map, reg, LPAIF_IRQ_PER(chan) | val);
+ val_clr = (LPAIF_IRQ_PER(chan) | val);
+ val_mask = LPAIF_IRQ_ALL(chan);
+ rv = regmap_update_bits(map, reg, val_mask, val_clr);
if (rv) {
dev_err(soc_runtime->dev,
"error writing to irqclear reg: %d\n", rv);
@@ -688,7 +689,9 @@ static irqreturn_t lpass_dma_interrupt_handler(
}
if (interrupts & LPAIF_IRQ_XRUN(chan)) {
- rv = regmap_write(map, reg, LPAIF_IRQ_XRUN(chan) | val);
+ val_clr = (LPAIF_IRQ_XRUN(chan) | val);
+ val_mask = LPAIF_IRQ_ALL(chan);
+ rv = regmap_update_bits(map, reg, val_mask, val_clr);
if (rv) {
dev_err(soc_runtime->dev,
"error writing to irqclear reg: %d\n", rv);
@@ -700,7 +703,9 @@ static irqreturn_t lpass_dma_interrupt_handler(
}
if (interrupts & LPAIF_IRQ_ERR(chan)) {
- rv = regmap_write(map, reg, LPAIF_IRQ_ERR(chan) | val);
+ val_clr = (LPAIF_IRQ_ERR(chan) | val);
+ val_mask = LPAIF_IRQ_ALL(chan);
+ rv = regmap_update_bits(map, reg, val_mask, val_clr);
if (rv) {
dev_err(soc_runtime->dev,
"error writing to irqclear reg: %d\n", rv);
--
Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc.,
is a member of Code Aurora Forum, a Linux Foundation Collaborative Project.
next reply other threads:[~2021-06-03 5:06 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-03 5:05 Srinivasa Rao Mandadapu [this message]
2021-06-03 6:17 ` [PATCH] ASoC: qcom: Fix for DMA interrupt clear reg overwriting Stephen Boyd
2021-06-05 10:31 ` Srinivasa Rao Mandadapu
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