From: Steven Lee <steven_lee@aspeedtech.com>
To: Linus Walleij <linus.walleij@linaro.org>,
Bartosz Golaszewski <bgolaszewski@baylibre.com>,
Rob Herring <robh+dt@kernel.org>, Joel Stanley <joel@jms.id.au>,
Andrew Jeffery <andrew@aj.id.au>,
"open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@vger.kernel.org>,
"moderated list:ARM/ASPEED MACHINE SUPPORT"
<linux-arm-kernel@lists.infradead.org>,
"moderated list:ARM/ASPEED MACHINE SUPPORT"
<linux-aspeed@lists.ozlabs.org>,
open list <linux-kernel@vger.kernel.org>
Cc: <steven_lee@aspeedtech.com>, <Hongweiz@ami.com>,
<ryan_chen@aspeedtech.com>, <billy_tsai@aspeedtech.com>
Subject: [PATCH v3 0/5] ASPEED sgpio driver enhancement.
Date: Thu, 3 Jun 2021 18:18:16 +0800 [thread overview]
Message-ID: <20210603101822.9645-1-steven_lee@aspeedtech.com> (raw)
AST2600 SoC has 2 SGPIO master interfaces one with 128 pins another one
with 80 pins, AST2500/AST2400 SoC has 1 SGPIO master interface that
supports up to 80 pins.
In the current driver design, the max number of sgpio pins is hardcoded
in macro MAX_NR_HW_SGPIO and the value is 80.
For supporting sgpio master interfaces of AST2600 SoC, the patch series
contains the following enhancement:
- Convert txt dt-bindings to yaml.
- Update aspeed-g6 dtsi to support the enhanced sgpio.
- Define max number of gpio pins in ast2600 platform data. Old chip
uses the original hardcoded value.
- Support muiltiple SGPIO master interfaces.
- Support up to 128 pins.
- Support wdt reset tolerance.
- Fix irq_chip issues which causes multiple sgpio devices use the same
irq_chip data.
Changes from v2:
* Remove maximum/minimum of ngpios from bindings.
* Remove max-ngpios from bindings and dtsi.
* Remove ast2400-sgpiom and ast2500-sgpiom compatibles from dts and
driver.
* Add ast2600-sgpiom1 and ast2600-sgpiom2 compatibles as their max
number of available gpio pins are different.
* Modify functions to pass aspeed_sgpio struct instead of passing
max_ngpios.
* Split sgpio driver patch to 3 patches
Changes from v1:
* Fix yaml format issues.
* Fix issues reported by kernel test robot.
Please help to review.
Thanks,
Steven
Steven Lee (5):
dt-bindings: aspeed-sgpio: Convert txt bindings to yaml.
ARM: dts: aspeed-g6: Add SGPIO node.
gpio: gpio-aspeed-sgpio: Add AST2600 sgpio support
gpio: gpio-aspeed-sgpio: Add set_config function
gpio: gpio-aspeed-sgpio: Move irq_chip to aspeed-sgpio struct
.../bindings/gpio/aspeed,sgpio.yaml | 78 ++++++++
.../devicetree/bindings/gpio/sgpio-aspeed.txt | 46 -----
arch/arm/boot/dts/aspeed-g6.dtsi | 30 +++
drivers/gpio/gpio-aspeed-sgpio.c | 182 +++++++++++++-----
4 files changed, 243 insertions(+), 93 deletions(-)
create mode 100644 Documentation/devicetree/bindings/gpio/aspeed,sgpio.yaml
delete mode 100644 Documentation/devicetree/bindings/gpio/sgpio-aspeed.txt
--
2.17.1
next reply other threads:[~2021-06-03 10:19 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-03 10:18 Steven Lee [this message]
2021-06-03 10:18 ` [PATCH v3 1/5] dt-bindings: aspeed-sgpio: Convert txt bindings to yaml Steven Lee
2021-06-03 23:25 ` Andrew Jeffery
2021-06-04 3:30 ` Steven Lee
2021-06-04 3:40 ` Andrew Jeffery
2021-06-09 9:17 ` Linus Walleij
2021-06-03 10:18 ` [PATCH v3 2/5] ARM: dts: aspeed-g6: Add SGPIO node Steven Lee
2021-06-03 23:29 ` Andrew Jeffery
2021-06-03 10:18 ` [PATCH v3 3/5] gpio: gpio-aspeed-sgpio: Add AST2600 sgpio support Steven Lee
2021-06-03 11:05 ` Andy Shevchenko
2021-06-04 2:08 ` Steven Lee
2021-06-04 2:14 ` Steven Lee
2021-06-04 10:21 ` Andy Shevchenko
2021-06-03 10:18 ` [PATCH v3 4/5] gpio: gpio-aspeed-sgpio: Add set_config function Steven Lee
2021-06-03 11:07 ` Andy Shevchenko
2021-06-04 2:18 ` Steven Lee
2021-06-03 10:18 ` [PATCH v3 5/5] gpio: gpio-aspeed-sgpio: Move irq_chip to aspeed-sgpio struct Steven Lee
2021-06-03 23:28 ` Andrew Jeffery
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