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[24.155.109.49]) by smtp.gmail.com with ESMTPSA id t15sm661221oie.14.2021.06.04.12.42.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 04 Jun 2021 12:42:00 -0700 (PDT) Received: (nullmailer pid 3786315 invoked by uid 1000); Fri, 04 Jun 2021 19:41:59 -0000 Date: Fri, 4 Jun 2021 14:41:59 -0500 From: Rob Herring To: Yanan Wang Cc: Paul Walmsley , Palmer Dabbelt , Albert Ou , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, wanghaibin.wang@huawei.com Subject: Re: [PATCH] Documentation: dt-bindings: Fix incorrect statement Message-ID: <20210604194159.GA3781429@robh.at.kernel.org> References: <20210521095720.5592-1-wangyanan55@huawei.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20210521095720.5592-1-wangyanan55@huawei.com> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Fri, May 21, 2021 at 05:57:20PM +0800, Yanan Wang wrote: > It's found when reading the Doc. Please improve the subject so we have some clue as to what the change is and what it applies to. > In a SMP system, the hierarchy of CPUs now can be defined through > four not three entities (socket/cluster/core/thread), so correct > the statement to avoid possible confusion. > > Since we are already there, also drop an extra space and tweak > the title alignment. No real context change at all. Since already here, converting to schema would be preferred over trivial fixes. > > Cc: Rob Herring > Cc: Paul Walmsley > Cc: Palmer Dabbelt > Cc: Albert Ou > Signed-off-by: Yanan Wang > --- > Documentation/devicetree/bindings/cpu/cpu-topology.txt | 8 ++++---- > 1 file changed, 4 insertions(+), 4 deletions(-) > > diff --git a/Documentation/devicetree/bindings/cpu/cpu-topology.txt b/Documentation/devicetree/bindings/cpu/cpu-topology.txt > index 9bd530a35d14..8b23a98c283c 100644 > --- a/Documentation/devicetree/bindings/cpu/cpu-topology.txt > +++ b/Documentation/devicetree/bindings/cpu/cpu-topology.txt > @@ -6,7 +6,7 @@ CPU topology binding description > 1 - Introduction > =========================================== > > -In a SMP system, the hierarchy of CPUs is defined through three entities that > +In a SMP system, the hierarchy of CPUs is defined through four entities that > are used to describe the layout of physical CPUs in the system: > > - socket > @@ -75,7 +75,7 @@ whose bindings are described in paragraph 3. > > The nodes describing the CPU topology (socket/cluster/core/thread) can > only be defined within the cpu-map node and every core/thread in the > -system must be defined within the topology. Any other configuration is > +system must be defined within the topology. Any other configuration is > invalid and therefore must be ignored. > > =========================================== > @@ -91,9 +91,9 @@ cpu-map child nodes which do not share a common parent node can have the same > name (ie same number N as other cpu-map child nodes at different device tree > levels) since name uniqueness will be guaranteed by the device tree hierarchy. > > -=========================================== > +============================================ > 3 - socket/cluster/core/thread node bindings > -=========================================== > +============================================ > > Bindings for socket/cluster/cpu/thread nodes are defined as follows: > > -- > 2.19.1