From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,UNPARSEABLE_RELAY,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6A3BFC48BCF for ; Thu, 10 Jun 2021 02:38:20 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 4859961410 for ; Thu, 10 Jun 2021 02:38:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229634AbhFJCkO (ORCPT ); Wed, 9 Jun 2021 22:40:14 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:39659 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S229557AbhFJCkN (ORCPT ); Wed, 9 Jun 2021 22:40:13 -0400 X-UUID: ef50c15be2334802b7cdca957a4e26cf-20210610 X-UUID: ef50c15be2334802b7cdca957a4e26cf-20210610 Received: from mtkcas06.mediatek.inc [(172.21.101.30)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 702430866; Thu, 10 Jun 2021 10:38:15 +0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs07n2.mediatek.inc (172.21.101.141) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 10 Jun 2021 10:38:14 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 10 Jun 2021 10:38:14 +0800 From: Chun-Jie Chen To: Enric Balletbo i Serra , Matthias Brugger , Nicolas Boichat , Rob Herring CC: , , , , , Subject: [PATCH 0/3] Mediatek MT8195 power domain support Date: Thu, 10 Jun 2021 10:36:11 +0800 Message-ID: <20210610023614.5375-1-chun-jie.chen@mediatek.com> X-Mailer: git-send-email 2.18.0 MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This patch series adds power domain support for MT8195 and is based on 5.13-rc3. chun-jie.chen (3): soc: mediatek: pm-domains: Move power status offset to power domain data dt-bindings: power: Add MT8195 power domains soc: mediatek: pm-domains: Add support for mt8195 .../power/mediatek,power-controller.yaml | 2 + drivers/soc/mediatek/mt8167-pm-domains.h | 16 +- drivers/soc/mediatek/mt8173-pm-domains.h | 22 +- drivers/soc/mediatek/mt8183-pm-domains.h | 32 +- drivers/soc/mediatek/mt8192-pm-domains.h | 44 +- drivers/soc/mediatek/mt8195-pm-domains.h | 738 ++++++++++++++++++ drivers/soc/mediatek/mtk-pm-domains.c | 12 +- drivers/soc/mediatek/mtk-pm-domains.h | 8 +- include/dt-bindings/power/mt8195-power.h | 51 ++ include/linux/soc/mediatek/infracfg.h | 103 +++ 10 files changed, 1013 insertions(+), 15 deletions(-) create mode 100644 drivers/soc/mediatek/mt8195-pm-domains.h create mode 100644 include/dt-bindings/power/mt8195-power.h -- 2.18.0