From: Anup Patel <anup.patel@wdc.com>
To: Palmer Dabbelt <palmer@dabbelt.com>,
Palmer Dabbelt <palmerdabbelt@google.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Thomas Gleixner <tglx@linutronix.de>,
Marc Zyngier <maz@kernel.org>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Rob Herring <robh+dt@kernel.org>
Cc: Atish Patra <atish.patra@wdc.com>,
Alistair Francis <Alistair.Francis@wdc.com>,
Anup Patel <anup@brainfault.org>,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, Anup Patel <anup.patel@wdc.com>
Subject: [RFC PATCH v1 02/10] RISC-V: Use common print prefix in smp.c
Date: Sat, 12 Jun 2021 21:34:14 +0530 [thread overview]
Message-ID: <20210612160422.330705-3-anup.patel@wdc.com> (raw)
In-Reply-To: <20210612160422.330705-1-anup.patel@wdc.com>
We add "#define pr_fmt()" in smp.c to use "riscv:" as common
print prefix for all pr_xyz() statements in this file.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
arch/riscv/kernel/smp.c | 9 +++++----
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/arch/riscv/kernel/smp.c b/arch/riscv/kernel/smp.c
index 547dc508f7d1..eea0c9d11d9f 100644
--- a/arch/riscv/kernel/smp.c
+++ b/arch/riscv/kernel/smp.c
@@ -8,6 +8,7 @@
* Copyright (C) 2017 SiFive
*/
+#define pr_fmt(fmt) "riscv: " fmt
#include <linux/cpu.h>
#include <linux/clockchips.h>
#include <linux/interrupt.h>
@@ -114,7 +115,7 @@ static void send_ipi_mask(const struct cpumask *mask, enum ipi_message_type op)
if (ipi_ops && ipi_ops->ipi_inject)
ipi_ops->ipi_inject(mask);
else
- pr_warn("SMP: IPI inject method not available\n");
+ pr_warn("IPI inject method not available\n");
}
static void send_ipi_single(int cpu, enum ipi_message_type op)
@@ -126,7 +127,7 @@ static void send_ipi_single(int cpu, enum ipi_message_type op)
if (ipi_ops && ipi_ops->ipi_inject)
ipi_ops->ipi_inject(cpumask_of(cpu));
else
- pr_warn("SMP: IPI inject method not available\n");
+ pr_warn("IPI inject method not available\n");
}
#ifdef CONFIG_IRQ_WORK
@@ -242,7 +243,7 @@ void smp_send_stop(void)
cpumask_clear_cpu(smp_processor_id(), &mask);
if (system_state <= SYSTEM_RUNNING)
- pr_crit("SMP: stopping secondary CPUs\n");
+ pr_crit("stopping secondary CPUs\n");
send_ipi_mask(&mask, IPI_CPU_STOP);
}
@@ -252,7 +253,7 @@ void smp_send_stop(void)
udelay(1);
if (num_online_cpus() > 1)
- pr_warn("SMP: failed to stop secondary CPUs %*pbl\n",
+ pr_warn("failed to stop secondary CPUs %*pbl\n",
cpumask_pr_args(cpu_online_mask));
}
--
2.25.1
next prev parent reply other threads:[~2021-06-12 16:05 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-12 16:04 [RFC PATCH v1 00/10] RISC-V ACLINT Support Anup Patel
2021-06-12 16:04 ` [RFC PATCH v1 01/10] RISC-V: Clear SIP bit only when using SBI IPI operations Anup Patel
2021-06-14 13:33 ` Bin Meng
2021-06-12 16:04 ` Anup Patel [this message]
2021-06-14 13:33 ` [RFC PATCH v1 02/10] RISC-V: Use common print prefix in smp.c Bin Meng
2021-06-12 16:04 ` [RFC PATCH v1 03/10] RISC-V: Allow more details in IPI operations Anup Patel
2021-06-12 16:04 ` [RFC PATCH v1 04/10] RISC-V: Use IPIs for remote TLB flush when possible Anup Patel
2021-06-13 9:33 ` Marc Zyngier
2021-06-13 12:28 ` Anup Patel
2021-06-12 16:04 ` [RFC PATCH v1 05/10] irqchip: Add ACLINT software interrupt driver Anup Patel
2021-06-13 9:41 ` Marc Zyngier
2021-06-13 12:25 ` Anup Patel
2021-06-14 9:38 ` Marc Zyngier
2021-06-14 13:13 ` Anup Patel
2021-06-12 16:04 ` [RFC PATCH v1 06/10] RISC-V: Select ACLINT SWI driver for virt machine Anup Patel
2021-06-14 13:34 ` Bin Meng
2021-06-12 16:04 ` [RFC PATCH v1 07/10] clocksource: clint: Add support for ACLINT MTIMER device Anup Patel
2021-06-14 13:34 ` Bin Meng
2021-06-12 16:04 ` [RFC PATCH v1 08/10] dt-bindings: timer: Add ACLINT MTIMER bindings Anup Patel
2021-06-14 13:34 ` Bin Meng
2021-06-12 16:04 ` [RFC PATCH v1 09/10] dt-bindings: timer: Add ACLINT MSWI and SSWI bindings Anup Patel
2021-06-14 13:34 ` Bin Meng
2021-06-24 19:37 ` Rob Herring
2021-06-12 16:04 ` [RFC PATCH v1 10/10] MAINTAINERS: Add entry for RISC-V ACLINT drivers Anup Patel
2021-06-14 13:34 ` Bin Meng
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210612160422.330705-3-anup.patel@wdc.com \
--to=anup.patel@wdc.com \
--cc=Alistair.Francis@wdc.com \
--cc=anup@brainfault.org \
--cc=atish.patra@wdc.com \
--cc=daniel.lezcano@linaro.org \
--cc=devicetree@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=maz@kernel.org \
--cc=palmer@dabbelt.com \
--cc=palmerdabbelt@google.com \
--cc=paul.walmsley@sifive.com \
--cc=robh+dt@kernel.org \
--cc=tglx@linutronix.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).