From: Yong Wu <yong.wu@mediatek.com>
To: Joerg Roedel <joro@8bytes.org>, Rob Herring <robh+dt@kernel.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
Will Deacon <will@kernel.org>,
Robin Murphy <robin.murphy@arm.com>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>,
Evan Green <evgreen@chromium.org>, Tomasz Figa <tfiga@google.com>,
Tomasz Figa <tfiga@chromium.org>,
<linux-mediatek@lists.infradead.org>,
<srv_heupstream@mediatek.com>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<iommu@lists.linux-foundation.org>, <yong.wu@mediatek.com>,
<youlin.pei@mediatek.com>,
Nicolas Boichat <drinkcat@chromium.org>, <anan.sun@mediatek.com>,
<chao.hao@mediatek.com>
Subject: [PATCH 22/24] iommu/mediatek: Get the proper bankid for multi banks
Date: Wed, 30 Jun 2021 10:35:02 +0800 [thread overview]
Message-ID: <20210630023504.18177-23-yong.wu@mediatek.com> (raw)
In-Reply-To: <20210630023504.18177-1-yong.wu@mediatek.com>
We preassign some portes in a special bank via the new defined
bank_portmsk.
If the iommu id in the iommu consumer's dtsi node is inside this
bank_portmsk, then we switch it to this special iommu bank, and initialise
the IOMMU bank HW.
Each a bank has the independent pgtable(4GB iova range). Each a bank
is a independent iommu domain/group. Currently we don't separate different
iova ranges inside a bank.
Signed-off-by: Yong Wu <yong.wu@mediatek.com>
---
drivers/iommu/mtk_iommu.c | 38 +++++++++++++++++++++++++++++++++++---
drivers/iommu/mtk_iommu.h | 1 +
2 files changed, 36 insertions(+), 3 deletions(-)
diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c
index 8137cfc9c8b9..e297a50adced 100644
--- a/drivers/iommu/mtk_iommu.c
+++ b/drivers/iommu/mtk_iommu.c
@@ -344,6 +344,30 @@ static irqreturn_t mtk_iommu_isr(int irq, void *dev_id)
return IRQ_HANDLED;
}
+static unsigned int mtk_iommu_get_bank_id(struct device *dev,
+ const struct mtk_iommu_plat_data *plat_data)
+{
+ struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev);
+ unsigned int i, portmsk = 0, bankid = 0; /* bank default is 0 */
+
+ if (plat_data->bank_nr == 1)
+ return bankid;
+
+ for (i = 0; i < fwspec->num_ids; i++)
+ portmsk |= BIT(MTK_M4U_TO_PORT(fwspec->ids[i]));
+
+ for (i = 0; i < plat_data->bank_nr; i++) {
+ if (!plat_data->bank_enable[i])
+ continue;
+
+ if (portmsk & plat_data->bank_portmsk[i]) {
+ bankid = i;
+ break;
+ }
+ }
+ return bankid;
+}
+
static int mtk_iommu_get_iova_region_id(struct device *dev,
const struct mtk_iommu_plat_data *plat_data)
{
@@ -509,13 +533,14 @@ static int mtk_iommu_attach_device(struct iommu_domain *domain,
struct mtk_iommu_domain *dom = to_mtk_domain(domain);
struct mtk_iommu_bank_data *bank;
struct device *m4udev = data->dev;
- unsigned int bankid = 0;
+ unsigned int bankid;
int ret, region_id;
region_id = mtk_iommu_get_iova_region_id(dev, data->plat_data);
if (region_id < 0)
return region_id;
+ bankid = mtk_iommu_get_bank_id(dev, data->plat_data);
bank = &data->bank[bankid];
if (!dom->bank) {
if (mtk_iommu_domain_finalise(dom, data, region_id))
@@ -644,6 +669,7 @@ static struct iommu_group *mtk_iommu_device_group(struct device *dev)
struct mtk_iommu_data *c_data = dev_iommu_priv_get(dev), *data;
struct list_head *hw_list = c_data->hw_list;
struct iommu_group *group;
+ unsigned int bankid, groupid;
int regionid;
data = mtk_iommu_get_frst_data(hw_list);
@@ -653,12 +679,18 @@ static struct iommu_group *mtk_iommu_device_group(struct device *dev)
regionid = mtk_iommu_get_iova_region_id(dev, data->plat_data);
if (regionid < 0)
return ERR_PTR(regionid);
+ bankid = mtk_iommu_get_bank_id(dev, data->plat_data);
- group = data->m4u_group[regionid];
+ /*
+ * If the bank function is enabled, each a bank is a iommu group/domain.
+ * otherwise, each a iova region is a iommu group/domain.
+ */
+ groupid = bankid ? bankid : regionid;
+ group = data->m4u_group[groupid];
if (!group) {
group = iommu_group_alloc();
if (!IS_ERR(group))
- data->m4u_group[regionid] = group;
+ data->m4u_group[groupid] = group;
} else {
iommu_group_ref_get(group);
}
diff --git a/drivers/iommu/mtk_iommu.h b/drivers/iommu/mtk_iommu.h
index 78d9481d67b5..8235957f1592 100644
--- a/drivers/iommu/mtk_iommu.h
+++ b/drivers/iommu/mtk_iommu.h
@@ -65,6 +65,7 @@ struct mtk_iommu_plat_data {
u32 bank_nr;
bool bank_enable[MTK_IOMMU_BANK_MAX];
+ unsigned int bank_portmsk[MTK_IOMMU_BANK_MAX];
unsigned char larbid_remap[MTK_LARB_COM_MAX][MTK_LARB_SUBCOM_MAX];
};
--
2.18.0
next prev parent reply other threads:[~2021-06-30 2:38 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-30 2:34 [PATCH 00/24] MT8195 IOMMU SUPPORT Yong Wu
2021-06-30 2:34 ` [PATCH 01/24] dt-bindings: mediatek: mt8195: Add binding for MM IOMMU Yong Wu
2021-06-30 6:26 ` Krzysztof Kozlowski
2021-06-30 7:30 ` Yong Wu
2021-07-14 21:11 ` Rob Herring
2021-06-30 2:34 ` [PATCH 02/24] dt-bindings: mediatek: mt8195: Add binding for infra IOMMU Yong Wu
2021-06-30 6:27 ` Krzysztof Kozlowski
2021-07-14 21:14 ` Rob Herring
2021-06-30 2:34 ` [PATCH 03/24] iommu/mediatek: Fix 2 HW sharing pgtable issue Yong Wu
2021-06-30 2:34 ` [PATCH 04/24] iommu/mediatek: Adapt sharing and non-sharing pgtable case Yong Wu
2021-06-30 2:34 ` [PATCH 05/24] iommu/mediatek: Add 12G~16G support for mult domain Yong Wu
2021-06-30 2:34 ` [PATCH 06/24] iommu/mediatek: Add a flag DCM_DISABLE Yong Wu
2021-06-30 2:34 ` [PATCH 07/24] iommu/mediatek: Add flag NON_STD_AXI Yong Wu
2021-06-30 2:34 ` [PATCH 08/24] iommu/mediatek: Remove for_each_m4u in tlb_sync_all Yong Wu
2021-06-30 2:34 ` [PATCH 09/24] iommu/mediatek: Always pm_runtime_get while tlb flush Yong Wu
2021-06-30 2:34 ` [PATCH 10/24] iommu/mediatek: Always enable output PA over 32bits in isr Yong Wu
2021-06-30 2:34 ` [PATCH 11/24] iommu/mediatek: Add SUB_COMMON_3BITS flag Yong Wu
2021-06-30 2:34 ` [PATCH 12/24] iommu/mediatek: Add IOMMU_TYPE flag Yong Wu
2021-06-30 2:34 ` [PATCH 13/24] iommu/mediatek: Add infra iommu support Yong Wu
2021-06-30 2:34 ` [PATCH 14/24] iommu/mediatek: Add PCIe support Yong Wu
2021-06-30 2:34 ` [PATCH 15/24] iommu/mediatek: Add mt8195 support Yong Wu
2021-06-30 2:34 ` [PATCH 16/24] iommu/mediatek: Only adjust code about register base Yong Wu
2021-06-30 2:34 ` [PATCH 17/24] iommu/mediatek: Just move code position in hw_init Yong Wu
2021-06-30 2:34 ` [PATCH 18/24] iommu/mediatek: Add mtk_iommu_bank_data structure Yong Wu
2021-06-30 2:34 ` [PATCH 19/24] iommu/mediatek: Initialise bank HW for each a bank Yong Wu
2021-06-30 2:35 ` [PATCH 20/24] iommu/mediatek: Add bank_nr and bank_enable Yong Wu
2021-06-30 2:35 ` [PATCH 21/24] iommu/mediatek: Change the domid to iova_region_id Yong Wu
2021-06-30 2:35 ` Yong Wu [this message]
2021-06-30 2:35 ` [PATCH 23/24] iommu/mediatek: Add multi bank support Yong Wu
2021-06-30 2:35 ` [PATCH 24/24] iommu/mediatek: mt8195: Enable multi-bank for infra iommu Yong Wu
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