From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D7B15C11F6B for ; Wed, 30 Jun 2021 13:31:58 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id BE96D61624 for ; Wed, 30 Jun 2021 13:31:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235005AbhF3Ne0 (ORCPT ); Wed, 30 Jun 2021 09:34:26 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41924 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234903AbhF3NeX (ORCPT ); Wed, 30 Jun 2021 09:34:23 -0400 Received: from mail-lj1-x22f.google.com (mail-lj1-x22f.google.com [IPv6:2a00:1450:4864:20::22f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 56A58C061766 for ; Wed, 30 Jun 2021 06:31:53 -0700 (PDT) Received: by mail-lj1-x22f.google.com with SMTP id h6so3293158ljl.8 for ; Wed, 30 Jun 2021 06:31:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=pUIlKUb2VNsBMxEGshGZSTgSUZ/+y9exbQnL3jxdY4Q=; b=m8/ZyOw8UIZzA4U6zFtgtKJQrhzLglN5hzj06KtI0x4gEO9vac+4oPc/JIJCmxe1g/ QGSGUeOaRPeT72vSXYEIAjj5bvORV6EPdLMaJhlz48AXCXKzAa7bXRaZv/nfS6Id1tFM y9lzzXwODdpPYlOzvHXecQBkIcBbOjZ5+4pCH7z6viMObyJFfbVNA1Sgh9xDh7TvClMW I0dIl0V1K1tBWgYXMtd42a9XsLfpk2I517EQg9mtP7AFQVdB5gVDhCaD9leKliJnfsnR zakCs+7l+lwFPVmT6kAycgRR2ZyoRqWfHKZlkxdDV+emmNqUUQ7nrRMwAsWTOSKN2SwY EJVw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=pUIlKUb2VNsBMxEGshGZSTgSUZ/+y9exbQnL3jxdY4Q=; b=hmRcjR4onweuewT5aLMOkAJE7JSwlN8OX9KfixGuDgZyrrZc6Yq6RH0w8fGMLpW5SZ DkLse3MRhwP42X6VU4W8/aLZVfTanVm1rgC5e2xdHNyerVZoFlHvm4BxfNvlZwWahp14 y98Dtg0tunYXyFnxuXSfwbmjc+ry8fZnWPVqZ/yJ16U8cedJStSHtXxTN17mDcorrwHe QJUTodygToFiSpu7rY8S5+6OfFLymaj8Cchl0NLmliWTJ0JKfkOGEC+eeJa/zGQ0KbcH iT6BPp1XAo8Q64RRYLq6DRUBPNky3iOjVGwU9A8JPHzlSWRRdNt04VrvEXr48ou3B3M4 t5fQ== X-Gm-Message-State: AOAM530Ph5gY2x80zXQW9veuLnEgrue6f1RYMqdYsikHDp0/9lPW0+8D w2HUILAmW8zkuwKO5wJ4Lch73Q== X-Google-Smtp-Source: ABdhPJzxy9lUaymj8qAVoABsxa20Jd6Ayfz1FEKoQipeBMEocruZ1StfMZia5UMaSaMSQORRW9HWqQ== X-Received: by 2002:a2e:9e8e:: with SMTP id f14mr7967443ljk.468.1625059911561; Wed, 30 Jun 2021 06:31:51 -0700 (PDT) Received: from eriador.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id x20sm1578098lfd.128.2021.06.30.06.31.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Jun 2021 06:31:50 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Rob Herring , Stephen Boyd , Taniya Das , Jonathan Marek , Michael Turquette Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Bryan O'Donoghue , Mark Brown , Ulf Hansson , linux-kernel@vger.kernel.org Subject: [PATCH 0/6] clk: qcom: use power-domain for sm8250's clock controllers Date: Wed, 30 Jun 2021 16:31:43 +0300 Message-Id: <20210630133149.3204290-1-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.30.2 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On SM8250 both the display and video clock controllers are powered up by the MMCX power domain. Handle this link in GDSC code by using pm_runtime_get/put to enable and disable the MMCX power domain. ---------------------------------------------------------------- Dmitry Baryshkov (6): dt-bindings: clock: qcom,dispcc-sm8x50: add mmcx power domain dt-bindings: clock: qcom,videocc: add mmcx power domain clk: qcom: gdsc: enable optional power domain support arm64: dts: qcom: sm8250: remove mmcx regulator clk: qcom: dispcc-sm8250: stop using mmcx regulator clk: qcom: videocc-sm8250: stop using mmcx regulator .../bindings/clock/qcom,dispcc-sm8x50.yaml | 19 ++++++++ .../devicetree/bindings/clock/qcom,videocc.yaml | 19 ++++++++ arch/arm64/boot/dts/qcom/sm8250.dtsi | 13 ++--- drivers/clk/qcom/common.c | 55 +++++++++++++++++++--- drivers/clk/qcom/dispcc-sm8250.c | 1 - drivers/clk/qcom/gdsc.c | 6 +++ drivers/clk/qcom/videocc-sm8250.c | 4 -- 7 files changed, 97 insertions(+), 20 deletions(-)