From: Oleksij Rempel <o.rempel@pengutronix.de>
To: Rob Herring <robh+dt@kernel.org>,
Sascha Hauer <s.hauer@pengutronix.de>,
Shawn Guo <shawnguo@kernel.org>
Cc: Oleksij Rempel <o.rempel@pengutronix.de>,
devicetree@vger.kernel.org, Fabio Estevam <festevam@gmail.com>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, NXP Linux Team <linux-imx@nxp.com>,
Pengutronix Kernel Team <kernel@pengutronix.de>,
David Jander <david@protonic.nl>
Subject: [PATCH v1] ARM: dts: imx6qp-prtwd3: configure ENET_REF clock to 125MHz
Date: Wed, 11 Aug 2021 09:38:35 +0200 [thread overview]
Message-ID: <20210811073835.32082-1-o.rempel@pengutronix.de> (raw)
By default ENET_REF is configured to 50MHz, which is usable for the RMII
link. In case RGMII is used, we need 125MHz clock.
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
---
arch/arm/boot/dts/imx6qp-prtwd3.dts | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/imx6qp-prtwd3.dts b/arch/arm/boot/dts/imx6qp-prtwd3.dts
index 9cbe3386c51a..effe032273f7 100644
--- a/arch/arm/boot/dts/imx6qp-prtwd3.dts
+++ b/arch/arm/boot/dts/imx6qp-prtwd3.dts
@@ -256,6 +256,8 @@ can@0 {
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
+ assigned-clocks = <&clks IMX6QDL_CLK_ENET_REF>;
+ assigned-clock-rates = <125000000>;
status = "okay";
phy-mode = "rgmii";
--
2.30.2
next reply other threads:[~2021-08-11 7:38 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-11 7:38 Oleksij Rempel [this message]
2021-08-14 5:53 ` [PATCH v1] ARM: dts: imx6qp-prtwd3: configure ENET_REF clock to 125MHz Shawn Guo
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