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From: Yong Wu <yong.wu@mediatek.com>
To: Joerg Roedel <joro@8bytes.org>, Rob Herring <robh+dt@kernel.org>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Will Deacon <will@kernel.org>,
	Robin Murphy <robin.murphy@arm.com>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>,
	Evan Green <evgreen@chromium.org>, Tomasz Figa <tfiga@google.com>,
	Tomasz Figa <tfiga@chromium.org>,
	<linux-mediatek@lists.infradead.org>,
	<srv_heupstream@mediatek.com>, <devicetree@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<iommu@lists.linux-foundation.org>, <yong.wu@mediatek.com>,
	<youlin.pei@mediatek.com>,
	Nicolas Boichat <drinkcat@chromium.org>, <anan.sun@mediatek.com>,
	<chao.hao@mediatek.com>
Subject: [PATCH v2 18/29] iommu/mediatek: Add PCIe support
Date: Fri, 13 Aug 2021 14:53:13 +0800	[thread overview]
Message-ID: <20210813065324.29220-19-yong.wu@mediatek.com> (raw)
In-Reply-To: <20210813065324.29220-1-yong.wu@mediatek.com>

Currently the code for of_iommu_configure_dev_id is like this:

static int of_iommu_configure_dev_id(struct device_node *master_np,
                                     struct device *dev,
                                     const u32 *id)
{
       struct of_phandle_args iommu_spec = { .args_count = 1 };

       err = of_map_id(master_np, *id, "iommu-map",
                       "iommu-map-mask", &iommu_spec.np,
                       iommu_spec.args);
...
}

It supports only one id output. BUT our PCIe HW has two ID(one is for
writing, the other is for reading). I'm not sure if we should change
of_map_id to support output MAX_PHANDLE_ARGS.

Here add the solution in ourselve drivers. If it's pcie case, enable one
more bit.

Not all infra iommu support PCIe, thus add a PCIe support flag here.

Signed-off-by: Yong Wu <yong.wu@mediatek.com>
---
 drivers/iommu/mtk_iommu.c | 17 ++++++++++++++++-
 1 file changed, 16 insertions(+), 1 deletion(-)

diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c
index 45b34f4e99fb..b7a31f3a1bcf 100644
--- a/drivers/iommu/mtk_iommu.c
+++ b/drivers/iommu/mtk_iommu.c
@@ -21,6 +21,7 @@
 #include <linux/of_address.h>
 #include <linux/of_irq.h>
 #include <linux/of_platform.h>
+#include <linux/pci.h>
 #include <linux/platform_device.h>
 #include <linux/pm_runtime.h>
 #include <linux/regmap.h>
@@ -133,6 +134,7 @@
 #define MTK_IOMMU_TYPE_MM		(0x0 << 13)
 #define MTK_IOMMU_TYPE_INFRA		(0x1 << 13)
 #define MTK_IOMMU_TYPE_MASK		(0x3 << 13)
+#define IFA_IOMMU_PCIe_SUPPORT		BIT(15)
 
 #define MTK_IOMMU_HAS_FLAG(pdata, _x)	(!!(((pdata)->flags) & (_x)))
 
@@ -409,8 +411,12 @@ static int mtk_iommu_config(struct mtk_iommu_data *data, struct device *dev,
 				larb_mmu->mmu &= ~MTK_SMI_MMU_EN(portid);
 		} else if (MTK_IOMMU_IS_TYPE(data->plat_data, MTK_IOMMU_TYPE_INFRA)) {
 			peri_mmuen_msk = BIT(portid);
-			peri_mmuen = enable ? peri_mmuen_msk : 0;
 
+			/* PCIdev has only one output id, enable the next writing bit for PCIe */
+			if (dev_is_pci(dev))
+				peri_mmuen_msk |= BIT(portid + 1);
+
+			peri_mmuen = enable ? peri_mmuen_msk : 0;
 			ret = regmap_update_bits(data->pericfg, PERICFG_IOMMU_1,
 						 peri_mmuen_msk, peri_mmuen);
 			if (ret)
@@ -996,6 +1002,15 @@ static int mtk_iommu_probe(struct platform_device *pdev)
 		ret = component_master_add_with_match(dev, &mtk_iommu_com_ops, match);
 		if (ret)
 			goto out_bus_set_null;
+	} else if (MTK_IOMMU_IS_TYPE(data->plat_data, MTK_IOMMU_TYPE_INFRA) &&
+		   MTK_IOMMU_HAS_FLAG(data->plat_data, IFA_IOMMU_PCIe_SUPPORT)) {
+		#ifdef CONFIG_PCI
+		if (!iommu_present(&pci_bus_type)) {
+			ret = bus_set_iommu(&pci_bus_type, &mtk_iommu_ops);
+			if (ret) /* PCIe fail don't affect platform_bus. */
+				goto out_list_del;
+		}
+		#endif
 	}
 	return ret;
 
-- 
2.18.0


  parent reply	other threads:[~2021-08-13  6:56 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-13  6:52 [PATCH v2 00/29] MT8195 IOMMU SUPPORT Yong Wu
2021-08-13  6:52 ` [PATCH v2 01/29] dt-bindings: mediatek: mt8195: Add binding for MM IOMMU Yong Wu
2021-08-13  6:52 ` [PATCH v2 02/29] dt-bindings: mediatek: mt8195: Add binding for infra IOMMU Yong Wu
2021-08-17 21:44   ` Rob Herring
2021-08-13  6:52 ` [PATCH v2 03/29] iommu/mediatek: Fix 2 HW sharing pgtable issue Yong Wu
2021-08-13  6:52 ` [PATCH v2 04/29] iommu/mediatek: Adapt sharing and non-sharing pgtable case Yong Wu
2021-08-13  6:53 ` [PATCH v2 05/29] iommu/mediatek: Add 12G~16G support for multi domains Yong Wu
2021-08-13  6:53 ` [PATCH v2 06/29] iommu/mediatek: Add a flag DCM_DISABLE Yong Wu
2021-08-13  6:53 ` [PATCH v2 07/29] iommu/mediatek: Add a flag NON_STD_AXI Yong Wu
2021-08-13  6:53 ` [PATCH v2 08/29] iommu/mediatek: Remove for_each_m4u in tlb_sync_all Yong Wu
2021-08-13  6:53 ` [PATCH v2 09/29] iommu/mediatek: Add tlb_lock in tlb_flush_all Yong Wu
2021-08-13  6:53 ` [PATCH v2 10/29] iommu/mediatek: Remove the granule in the tlb flush Yong Wu
2021-08-13  6:53 ` [PATCH v2 11/29] iommu/mediatek: Always pm_runtime_get while " Yong Wu
2021-08-24  7:10   ` Hsin-Yi Wang
2021-09-01 12:10     ` Yong Wu (吴勇)
2021-09-30 11:26   ` Dafna Hirschfeld
2021-10-07  3:00     ` Yong Wu
2021-08-13  6:53 ` [PATCH v2 12/29] iommu/mediatek: Always enable output PA over 32bits in isr Yong Wu
2021-08-13  6:53 ` [PATCH v2 13/29] iommu/mediatek: Add SUB_COMMON_3BITS flag Yong Wu
2021-08-13  6:53 ` [PATCH v2 14/29] iommu/mediatek: Add IOMMU_TYPE flag Yong Wu
2021-08-13  6:53 ` [PATCH v2 15/29] iommu/mediatek: Contain MM IOMMU flow with the MM TYPE Yong Wu
2021-08-13  6:53 ` [PATCH v2 16/29] iommu/mediatek: Adjust device link when it is sub-common Yong Wu
2021-08-24  7:35   ` Hsin-Yi Wang
2021-09-01 12:01     ` Yong Wu (吴勇)
2021-08-13  6:53 ` [PATCH v2 17/29] iommu/mediatek: Add infra iommu support Yong Wu
2021-08-13  6:53 ` Yong Wu [this message]
2021-08-13  6:53 ` [PATCH v2 19/29] iommu/mediatek: Add mt8195 support Yong Wu
2021-08-13  6:53 ` [PATCH v2 20/29] iommu/mediatek: Only adjust code about register base Yong Wu
2021-08-13  6:53 ` [PATCH v2 21/29] iommu/mediatek: Just move code position in hw_init Yong Wu
2021-08-13  6:53 ` [PATCH v2 22/29] iommu/mediatek: Add mtk_iommu_bank_data structure Yong Wu
2021-08-13  6:53 ` [PATCH v2 23/29] iommu/mediatek: Initialise bank HW for each a bank Yong Wu
2021-08-13  6:53 ` [PATCH v2 24/29] iommu/mediatek: Add bank_nr and bank_enable Yong Wu
2021-08-13  6:53 ` [PATCH v2 25/29] iommu/mediatek: Change the domid to iova_region_id Yong Wu
2021-08-13  6:53 ` [PATCH v2 26/29] iommu/mediatek: Get the proper bankid for multi banks Yong Wu
2021-08-13  6:53 ` [PATCH v2 27/29] iommu/mediatek: Initialise/Remove for multi bank dev Yong Wu
2021-08-13  6:53 ` [PATCH v2 28/29] iommu/mediatek: Backup/restore regsiters for multi banks Yong Wu
2021-08-13  6:53 ` [PATCH v2 29/29] iommu/mediatek: mt8195: Enable multi banks for infra iommu Yong Wu

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