* [PATCH] arm64: dts: hisilicon: fix arm,sp805 compatible string
@ 2021-08-30 16:51 Michael Walle
2021-09-18 9:25 ` Wei Xu
0 siblings, 1 reply; 2+ messages in thread
From: Michael Walle @ 2021-08-30 16:51 UTC (permalink / raw)
To: linux-arm-kernel, devicetree, linux-kernel
Cc: Wei Xu, Rob Herring, Michael Walle
According to Documentation/devicetree/bindings/watchdog/arm,sp805.yaml
the compatible is:
compatible = "arm,sp805", "arm,primecell";
The current compatible string doesn't exist at all. Fix it.
Signed-off-by: Michael Walle <michael@walle.cc>
---
There are also the layerscape SoC which are using these compatible
strings. I'm on it to change these, too.
arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 4 ++--
arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 2 +-
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
index 2d5c1a348716..6eabec2602e2 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
@@ -1087,7 +1087,7 @@ dwmmc2: dwmmc2@ff3ff000 {
};
watchdog0: watchdog@e8a06000 {
- compatible = "arm,sp805-wdt", "arm,primecell";
+ compatible = "arm,sp805", "arm,primecell";
reg = <0x0 0xe8a06000 0x0 0x1000>;
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&crg_ctrl HI3660_OSC32K>,
@@ -1096,7 +1096,7 @@ watchdog0: watchdog@e8a06000 {
};
watchdog1: watchdog@e8a07000 {
- compatible = "arm,sp805-wdt", "arm,primecell";
+ compatible = "arm,sp805", "arm,primecell";
reg = <0x0 0xe8a07000 0x0 0x1000>;
interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&crg_ctrl HI3660_OSC32K>,
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index dde9371dc545..e4860b8a638e 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -840,7 +840,7 @@ dwmmc_2: dwmmc2@f723f000 {
};
watchdog0: watchdog@f8005000 {
- compatible = "arm,sp805-wdt", "arm,primecell";
+ compatible = "arm,sp805", "arm,primecell";
reg = <0x0 0xf8005000 0x0 0x1000>;
interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ao_ctrl HI6220_WDT0_PCLK>,
--
2.30.2
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH] arm64: dts: hisilicon: fix arm,sp805 compatible string
2021-08-30 16:51 [PATCH] arm64: dts: hisilicon: fix arm,sp805 compatible string Michael Walle
@ 2021-09-18 9:25 ` Wei Xu
0 siblings, 0 replies; 2+ messages in thread
From: Wei Xu @ 2021-09-18 9:25 UTC (permalink / raw)
To: Michael Walle, linux-arm-kernel, devicetree, linux-kernel; +Cc: Rob Herring
Hi Michael,
On 2021/8/31 0:51, Michael Walle wrote:
> According to Documentation/devicetree/bindings/watchdog/arm,sp805.yaml
> the compatible is:
> compatible = "arm,sp805", "arm,primecell";
>
> The current compatible string doesn't exist at all. Fix it.
>
> Signed-off-by: Michael Walle <michael@walle.cc>
Applied to the HiSilicon arm64 dt tree.
Thanks!
Best Regards,
Wei
> ---
> There are also the layerscape SoC which are using these compatible
> strings. I'm on it to change these, too.
>
> arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 4 ++--
> arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 2 +-
> 2 files changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
> index 2d5c1a348716..6eabec2602e2 100644
> --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
> +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
> @@ -1087,7 +1087,7 @@ dwmmc2: dwmmc2@ff3ff000 {
> };
>
> watchdog0: watchdog@e8a06000 {
> - compatible = "arm,sp805-wdt", "arm,primecell";
> + compatible = "arm,sp805", "arm,primecell";
> reg = <0x0 0xe8a06000 0x0 0x1000>;
> interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&crg_ctrl HI3660_OSC32K>,
> @@ -1096,7 +1096,7 @@ watchdog0: watchdog@e8a06000 {
> };
>
> watchdog1: watchdog@e8a07000 {
> - compatible = "arm,sp805-wdt", "arm,primecell";
> + compatible = "arm,sp805", "arm,primecell";
> reg = <0x0 0xe8a07000 0x0 0x1000>;
> interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&crg_ctrl HI3660_OSC32K>,
> diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
> index dde9371dc545..e4860b8a638e 100644
> --- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
> +++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
> @@ -840,7 +840,7 @@ dwmmc_2: dwmmc2@f723f000 {
> };
>
> watchdog0: watchdog@f8005000 {
> - compatible = "arm,sp805-wdt", "arm,primecell";
> + compatible = "arm,sp805", "arm,primecell";
> reg = <0x0 0xf8005000 0x0 0x1000>;
> interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&ao_ctrl HI6220_WDT0_PCLK>,
>
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2021-09-18 9:25 ` Wei Xu
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