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From: Mark Brown <broonie@kernel.org>
To: Parshuram Thombare <pthombar@cadence.com>
Cc: lukas@wunner.de, p.yadav@ti.com, robh+dt@kernel.org,
	linux-spi@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, jpawar@cadence.com,
	mparab@cadence.com, Konrad Kociolek <konrad@cadence.com>
Subject: Re: [PATCH v3 2/2] spi: cadence: add support for Cadence XSPI controller
Date: Thu, 2 Sep 2021 15:39:47 +0100	[thread overview]
Message-ID: <20210902143947.GC11164@sirena.org.uk> (raw)
In-Reply-To: <1630499858-20456-1-git-send-email-pthombar@cadence.com>

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On Wed, Sep 01, 2021 at 02:37:38PM +0200, Parshuram Thombare wrote:

> +++ b/drivers/spi/spi-cadence-xspi.c
> @@ -0,0 +1,837 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Cadence XSPI flash controller driver

Please make the entire comment a C++ so things look more intentional.

> +static int cdns_xspi_setup(struct spi_device *spi_dev)
> +{
> +	if (spi_dev->chip_select > spi_dev->master->num_chipselect) {
> +		dev_err(&spi_dev->dev,
> +			"%d chip-select is out of range\n",
> +			spi_dev->chip_select);
> +		return -EINVAL;
> +	}
> +
> +	return 0;
> +}

The core already validates this, are you seeing it happen?  If so we
should fix the core and either way just remove setup() entirely.

> +	if (irq_status) {
> +		writel(irq_status,
> +		       cdns_xspi->iobase + CDNS_XSPI_INTR_STATUS_REG);
> +
> +		if (irq_status & CDNS_XSPI_SDMA_ERROR) {
> +			dev_err(cdns_xspi->dev,
> +				"Slave DMA transaction error\n");
> +			cdns_xspi->sdma_error = true;
> +			complete(&cdns_xspi->sdma_complete);
> +		}
> +
> +		if (irq_status & CDNS_XSPI_SDMA_TRIGGER)
> +			complete(&cdns_xspi->sdma_complete);
> +
> +		if (irq_status & CDNS_XSPI_STIG_DONE)
> +			complete(&cdns_xspi->cmd_complete);
> +
> +		result = IRQ_HANDLED;
> +	}

We will just silently ignore any unknown interrupts here.  It would be
better to either only ack known interrupts (so genirq can notice if
there's a problem with other interrupts) or at least log that we're
seeing unexpected interrupts.  The current code will cause trouble if
this is deployed in a system with the interrupt line shared (which the
driver claims to support), or if something goes wrong and the IP starts
asserting some interrupt that isn't expected.

> +	master->mode_bits = SPI_3WIRE | SPI_TX_DUAL  | SPI_TX_QUAD  |
> +		SPI_RX_DUAL | SPI_RX_QUAD | SPI_TX_OCTAL | SPI_RX_OCTAL |
> +		SPI_MODE_0  | SPI_MODE_3;

I don't see any handling of these in the code?

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  reply	other threads:[~2021-09-02 14:40 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-01 12:35 [PATCH v3 0/2] add support for Cadence's XSPI controller Parshuram Thombare
2021-09-01 12:37 ` [PATCH v3 1/2] spi: cadence: add dt-bindings documentation for Cadence " Parshuram Thombare
2021-09-02 12:03   ` Rob Herring
2021-09-03  8:03     ` Parshuram Raju Thombare
2021-09-03 18:17   ` Pratyush Yadav
2021-09-08  6:52     ` Parshuram Raju Thombare
2021-09-08 11:32       ` Pratyush Yadav
2021-09-08 11:58         ` Parshuram Raju Thombare
2021-09-01 12:37 ` [PATCH v3 2/2] spi: cadence: add support " Parshuram Thombare
2021-09-02 14:39   ` Mark Brown [this message]
2021-09-03  8:10     ` Parshuram Raju Thombare
2021-09-03 10:18       ` Mark Brown
2021-09-03 10:47         ` Parshuram Raju Thombare
2021-09-03 11:24           ` Mark Brown
2021-09-03 18:56   ` Pratyush Yadav
2021-09-08  7:27     ` Parshuram Raju Thombare
2021-09-08 11:21       ` Pratyush Yadav
2021-09-08 11:40         ` Parshuram Raju Thombare
2021-09-08 12:24         ` Mark Brown
2021-09-08 16:22           ` Pratyush Yadav

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