From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 96AE7C433EF for ; Wed, 15 Sep 2021 20:39:45 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7347B6112E for ; Wed, 15 Sep 2021 20:39:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231882AbhIOUlE (ORCPT ); Wed, 15 Sep 2021 16:41:04 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60876 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231490AbhIOUlD (ORCPT ); Wed, 15 Sep 2021 16:41:03 -0400 Received: from mail-qt1-x831.google.com (mail-qt1-x831.google.com [IPv6:2607:f8b0:4864:20::831]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3091FC061574 for ; Wed, 15 Sep 2021 13:39:44 -0700 (PDT) Received: by mail-qt1-x831.google.com with SMTP id u4so3627686qta.2 for ; Wed, 15 Sep 2021 13:39:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=poorly.run; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=9OuUx3KXVHJzGt1nkLMrzoX0tQkzHA3ws4rQqxVIlAU=; b=Gplj4vlsNLaGWWlUfnYJZw6WjTg0vIpqnB0tUu5lVhgJX6jnBQ6efnvb1U/rmq7Ibn UeqnfcOTnqUZk42vDAJmgbqJI4idzeq+C7JC429NNojeDfNLXYPUEVoGQSaLuQci7ZDN TozBYn6EDnNElG7Ie+I/6c3XnemtP1uguZJ63397Lmia4hi/syUd7yy0JSKRzwpz2zPW /7jZwq2Hsl9MmeLZheJSR7NHUZ/0KyPDjjswdqHuxmcS7x+0RPYoQTlqC3pdJAS4VVeX aquHQHpkrsi72qj6LMohkeEFzZNwr7ko9IdKT17J8TMsoniVLMXUATMIb3q+is8/BmXC Kevg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=9OuUx3KXVHJzGt1nkLMrzoX0tQkzHA3ws4rQqxVIlAU=; b=eXBFyl/Nty5uNAqpAaYU+opnuGm2knbKv4m1zj2vnoY9H0zPQV9PF6OCj/agpn/ugq Cc3r8QgDq+h+tBbXTWdLUG+V+y5o82MY1/2LIt9Y5AjjwNjCWc/x3WCnwTbpoVDUbA3h +6HxIDkKdIxc2bPJ6EL6Ajw0+ub8949SUzHTgYoy/pmO1DinV4/NQIpreuiBxu40BoU8 cE69enXmNaJgl462VA+ZCsDOfaV3jPJV8C1T+sCidoqUtpNUjS9CADJBGSCthhQ6dKqO 3WgbNfcpUt6iX4OBAsIS7NnG0MCfoNOVYwU7Phgj6VQ1EON0k3SfQbpbkYdJmgX2FREN z1UA== X-Gm-Message-State: AOAM533Ef6sVy6C/zI8K9ukCp1NUS1Tg+tk5xu//cOcT5+ouVjXnzPzC F8QhCiM1+3zEwz85bLCSgiqOgw== X-Google-Smtp-Source: ABdhPJwv8VMJ4KHRU0dxak2AD3U+O/PeXgwnCOo3RcWxIVJqB9SSvTLPKmheRvTC6ByxBh3Brhm6ig== X-Received: by 2002:ac8:70b:: with SMTP id g11mr1789777qth.387.1631738383390; Wed, 15 Sep 2021 13:39:43 -0700 (PDT) Received: from localhost ([167.100.64.199]) by smtp.gmail.com with ESMTPSA id j18sm843374qke.75.2021.09.15.13.39.42 (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 15 Sep 2021 13:39:42 -0700 (PDT) From: Sean Paul To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, freedreno@lists.freedesktop.org Cc: swboyd@chromium.org, Sean Paul , Rob Herring , Rob Clark , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Kuogee Hsieh , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v2 12/13] dt-bindings: msm/dp: Add bindings for HDCP registers Date: Wed, 15 Sep 2021 16:38:31 -0400 Message-Id: <20210915203834.1439-13-sean@poorly.run> X-Mailer: git-send-email 2.31.0 In-Reply-To: <20210915203834.1439-1-sean@poorly.run> References: <20210915203834.1439-1-sean@poorly.run> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Sean Paul This patch adds the bindings for the MSM DisplayPort HDCP registers which are required to write the HDCP key into the display controller as well as the registers to enable HDCP authentication/key exchange/encryption. Cc: Rob Herring Cc: Stephen Boyd Signed-off-by: Sean Paul Link: https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-13-sean@poorly.run #v1 Changes in v2: -Drop register range names (Stephen) -Fix yaml errors (Rob) --- .../devicetree/bindings/display/msm/dp-controller.yaml | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml index 64d8d9e5e47a..80a55e9ff532 100644 --- a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml +++ b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml @@ -19,7 +19,7 @@ properties: - qcom,sc7180-dp reg: - maxItems: 1 + maxItems: 3 interrupts: maxItems: 1 @@ -99,8 +99,9 @@ examples: #include displayport-controller@ae90000 { - compatible = "qcom,sc7180-dp"; - reg = <0xae90000 0x1400>; + reg = <0 0x0ae90000 0 0x1400>, + <0 0x0aed1000 0 0x174>, + <0 0x0aee1000 0 0x2c>; interrupt-parent = <&mdss>; interrupts = <12>; clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, -- Sean Paul, Software Engineer, Google / Chromium OS