From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9225CC433EF for ; Mon, 27 Sep 2021 13:56:56 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7CEF061002 for ; Mon, 27 Sep 2021 13:56:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234676AbhI0N6d (ORCPT ); Mon, 27 Sep 2021 09:58:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49804 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234675AbhI0N6d (ORCPT ); Mon, 27 Sep 2021 09:58:33 -0400 Received: from mail-wr1-x42e.google.com (mail-wr1-x42e.google.com [IPv6:2a00:1450:4864:20::42e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 23A23C061575 for ; Mon, 27 Sep 2021 06:56:55 -0700 (PDT) Received: by mail-wr1-x42e.google.com with SMTP id d6so51972542wrc.11 for ; Mon, 27 Sep 2021 06:56:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=oA13aWw/vBigvq7sNCk3NCQoESUEmWiPzPnMa1c1hkI=; b=u9J6WVhgN5lYTkVK1L+YSQgoFIUbWoaZb2IVAaYto64n4GZHdaKa6DWWBQGEtNLYab c6AI1pCJkYsgYfOLd4YfwVi6QdZ2zn6/ZImdpvcfQGRz1QvKjncNc6TRMiO6UVtCITcu d/iIh1rANXagBnqUB4Q0i5krVqUq4rK8Fj7zEoKIroRbgP5ZcHeuDMBxJQ7Adr5gHBbn K5DLO/TbYrBMDXvy5wLsOgqDShEtUPNIidTn1DDPZuUpyX5T74OfSuq+HtqTkj244O4e 1fVUdG4dJ4+gywqaUfKmcrKzbYQXZ65Nr4VLtsVpLyE5WHjPKrFfDMxvaPe+V3K3oPSU QvtQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=oA13aWw/vBigvq7sNCk3NCQoESUEmWiPzPnMa1c1hkI=; b=joN4RDtPUCHYLh2GAKW4C3GHUiY801YUMk7/BbmfsRrVRkN1tWzmBsS43g5NsCt7bJ 3hV9QYj7gHfahJ3gSlzv8Sll8BWkKTBfH3ZQmJBIRP4Z6rod/EOODpr5drbXthOzmeS6 su3I+Y2GoMSDBHAKkQpodA034qnMF3YidtL6KZsN45SFmRydAqkESKGkw0alfJg9zMWa 1Lrl+XGsub5uB1rYSIv51CLbGE5tHL8fWQNUj94l0e8xZTKOqS2l7ucsTMi4J6E8sSpS OmIWPEzsUyhb4tDLHzddcfKdynO8l/4+ZRGiPuZ9PLLtIV/pMAvv/zqjLyi6lmrd+94F uRZw== X-Gm-Message-State: AOAM530aoqTwvOAWia5/+mO/MRdxPq3RTQvr1E3E/CynAwndPpV5M/iO YLQV1jH/7xUTnrFxIxVnTiNWZQ== X-Google-Smtp-Source: ABdhPJzN2bwcoG4Be3YzHGA/mEDi/p27OzQRPHGLCnf+5Y3dGtPrh1LtsrTNaQ7zaVjhdGeLVlOadg== X-Received: by 2002:adf:e583:: with SMTP id l3mr12037692wrm.390.1632751013789; Mon, 27 Sep 2021 06:56:53 -0700 (PDT) Received: from srini-hackbox.lan (cpc86377-aztw32-2-0-cust226.18-1.cable.virginm.net. [92.233.226.227]) by smtp.gmail.com with ESMTPSA id b7sm20485606wrm.9.2021.09.27.06.56.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Sep 2021 06:56:53 -0700 (PDT) From: Srinivas Kandagatla To: bjorn.andersson@linaro.org, broonie@kernel.org, robh@kernel.org Cc: plai@codeaurora.org, pierre-louis.bossart@linux.intel.com, tiwai@suse.de, devicetree@vger.kernel.org, perex@perex.cz, alsa-devel@alsa-project.org, lgirdwood@gmail.com, bgoswami@codeaurora.org, Srinivas Kandagatla Subject: [PATCH v8 22/22] ASoC: qdsp6: audioreach: add support for q6prm-clocks Date: Mon, 27 Sep 2021 14:55:59 +0100 Message-Id: <20210927135559.738-23-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20210927135559.738-1-srinivas.kandagatla@linaro.org> References: <20210927135559.738-1-srinivas.kandagatla@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add q6prm clocks using existing qdsp6-audio-clock driver Signed-off-by: Srinivas Kandagatla --- sound/soc/qcom/Kconfig | 4 ++ sound/soc/qcom/qdsp6/Makefile | 1 + sound/soc/qcom/qdsp6/q6prm-clocks.c | 85 +++++++++++++++++++++++++++++ 3 files changed, 90 insertions(+) create mode 100644 sound/soc/qcom/qdsp6/q6prm-clocks.c diff --git a/sound/soc/qcom/Kconfig b/sound/soc/qcom/Kconfig index 465a2a603401..5b74c5bcc47f 100644 --- a/sound/soc/qcom/Kconfig +++ b/sound/soc/qcom/Kconfig @@ -96,8 +96,12 @@ config SND_SOC_QDSP6_APM select SND_SOC_QDSP6_APM_DAI select SND_SOC_QDSP6_APM_LPASS_DAI +config SND_SOC_QDSP6_PRM_LPASS_CLOCKS + tristate + config SND_SOC_QDSP6_PRM tristate + select SND_SOC_QDSP6_PRM_LPASS_CLOCKS config SND_SOC_QDSP6 tristate "SoC ALSA audio driver for QDSP6" diff --git a/sound/soc/qcom/qdsp6/Makefile b/sound/soc/qcom/qdsp6/Makefile index c932f8e24b32..3963bf234664 100644 --- a/sound/soc/qcom/qdsp6/Makefile +++ b/sound/soc/qcom/qdsp6/Makefile @@ -16,3 +16,4 @@ obj-$(CONFIG_SND_SOC_QDSP6_APM) += snd-q6apm.o obj-$(CONFIG_SND_SOC_QDSP6_APM_DAI) += q6apm-dai.o obj-$(CONFIG_SND_SOC_QDSP6_APM_LPASS_DAI) += q6apm-lpass-dais.o obj-$(CONFIG_SND_SOC_QDSP6_PRM) += q6prm.o +obj-$(CONFIG_SND_SOC_QDSP6_PRM_LPASS_CLOCKS) += q6prm-clocks.o diff --git a/sound/soc/qcom/qdsp6/q6prm-clocks.c b/sound/soc/qcom/qdsp6/q6prm-clocks.c new file mode 100644 index 000000000000..a26cda5140c1 --- /dev/null +++ b/sound/soc/qcom/qdsp6/q6prm-clocks.c @@ -0,0 +1,85 @@ +// SPDX-License-Identifier: GPL-2.0 +// Copyright (c) 2021, Linaro Limited + +#include +#include +#include +#include +#include +#include +#include +#include "q6dsp-lpass-clocks.h" +#include "q6prm.h" + +#define Q6PRM_CLK(id) { \ + .clk_id = id, \ + .q6dsp_clk_id = Q6PRM_##id, \ + .name = #id, \ + .rate = 19200000, \ + } + +static const struct q6dsp_clk_init q6prm_clks[] = { + Q6PRM_CLK(LPASS_CLK_ID_PRI_MI2S_IBIT), + Q6PRM_CLK(LPASS_CLK_ID_PRI_MI2S_EBIT), + Q6PRM_CLK(LPASS_CLK_ID_SEC_MI2S_IBIT), + Q6PRM_CLK(LPASS_CLK_ID_SEC_MI2S_EBIT), + Q6PRM_CLK(LPASS_CLK_ID_TER_MI2S_IBIT), + Q6PRM_CLK(LPASS_CLK_ID_TER_MI2S_EBIT), + Q6PRM_CLK(LPASS_CLK_ID_QUAD_MI2S_IBIT), + Q6PRM_CLK(LPASS_CLK_ID_QUAD_MI2S_EBIT), + Q6PRM_CLK(LPASS_CLK_ID_SPEAKER_I2S_IBIT), + Q6PRM_CLK(LPASS_CLK_ID_SPEAKER_I2S_EBIT), + Q6PRM_CLK(LPASS_CLK_ID_SPEAKER_I2S_OSR), + Q6PRM_CLK(LPASS_CLK_ID_QUI_MI2S_IBIT), + Q6PRM_CLK(LPASS_CLK_ID_QUI_MI2S_EBIT), + Q6PRM_CLK(LPASS_CLK_ID_SEN_MI2S_IBIT), + Q6PRM_CLK(LPASS_CLK_ID_SEN_MI2S_EBIT), + Q6PRM_CLK(LPASS_CLK_ID_INT0_MI2S_IBIT), + Q6PRM_CLK(LPASS_CLK_ID_INT1_MI2S_IBIT), + Q6PRM_CLK(LPASS_CLK_ID_INT2_MI2S_IBIT), + Q6PRM_CLK(LPASS_CLK_ID_INT3_MI2S_IBIT), + Q6PRM_CLK(LPASS_CLK_ID_INT4_MI2S_IBIT), + Q6PRM_CLK(LPASS_CLK_ID_INT5_MI2S_IBIT), + Q6PRM_CLK(LPASS_CLK_ID_INT6_MI2S_IBIT), + Q6PRM_CLK(LPASS_CLK_ID_QUI_MI2S_OSR), + Q6PRM_CLK(LPASS_CLK_ID_WSA_CORE_MCLK), + Q6PRM_CLK(LPASS_CLK_ID_WSA_CORE_NPL_MCLK), + Q6PRM_CLK(LPASS_CLK_ID_VA_CORE_MCLK), + Q6PRM_CLK(LPASS_CLK_ID_TX_CORE_MCLK), + Q6PRM_CLK(LPASS_CLK_ID_TX_CORE_NPL_MCLK), + Q6PRM_CLK(LPASS_CLK_ID_RX_CORE_MCLK), + Q6PRM_CLK(LPASS_CLK_ID_RX_CORE_NPL_MCLK), + Q6PRM_CLK(LPASS_CLK_ID_VA_CORE_2X_MCLK), + Q6DSP_VOTE_CLK(LPASS_HW_MACRO_VOTE, Q6PRM_HW_CORE_ID_LPASS, + "LPASS_HW_MACRO"), + Q6DSP_VOTE_CLK(LPASS_HW_DCODEC_VOTE, Q6PRM_HW_CORE_ID_DCODEC, + "LPASS_HW_DCODEC"), +}; + +static const struct q6dsp_clk_desc q6dsp_clk_q6prm __maybe_unused = { + .clks = q6prm_clks, + .num_clks = ARRAY_SIZE(q6prm_clks), + .lpass_set_clk = q6prm_set_lpass_clock, + .lpass_vote_clk = q6prm_vote_lpass_core_hw, + .lpass_unvote_clk = q6prm_unvote_lpass_core_hw, +}; + +#ifdef CONFIG_OF +static const struct of_device_id q6prm_clock_device_id[] = { + { .compatible = "qcom,q6prm-lpass-clocks", .data = &q6dsp_clk_q6prm }, + {}, +}; +MODULE_DEVICE_TABLE(of, q6prm_clock_device_id); +#endif + +static struct platform_driver q6prm_clock_platform_driver = { + .driver = { + .name = "q6prm-lpass-clock", + .of_match_table = of_match_ptr(q6prm_clock_device_id), + }, + .probe = q6dsp_clock_dev_probe, +}; +module_platform_driver(q6prm_clock_platform_driver); + +MODULE_DESCRIPTION("Q6 Proxy Resource Manager LPASS clock driver"); +MODULE_LICENSE("GPL"); -- 2.21.0