From: Ansuel Smith <ansuelsmth@gmail.com>
To: Andrew Lunn <andrew@lunn.ch>,
Vivien Didelot <vivien.didelot@gmail.com>,
Florian Fainelli <f.fainelli@gmail.com>,
Vladimir Oltean <olteanv@gmail.com>,
"David S. Miller" <davem@davemloft.net>,
Jakub Kicinski <kuba@kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Heiner Kallweit <hkallweit1@gmail.com>,
Russell King <linux@armlinux.org.uk>,
Ansuel Smith <ansuelsmth@gmail.com>,
netdev@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: [net-next PATCH 04/13] drivers: net: phy: at803x: better describe debug regs
Date: Thu, 7 Oct 2021 00:35:54 +0200 [thread overview]
Message-ID: <20211006223603.18858-5-ansuelsmth@gmail.com> (raw)
In-Reply-To: <20211006223603.18858-1-ansuelsmth@gmail.com>
Give a name to known debug regs from Documentation instead of using
unknown hex values.
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
---
drivers/net/phy/at803x.c | 22 +++++++++++-----------
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/drivers/net/phy/at803x.c b/drivers/net/phy/at803x.c
index 851d47b8a331..f40f17a632ad 100644
--- a/drivers/net/phy/at803x.c
+++ b/drivers/net/phy/at803x.c
@@ -86,12 +86,12 @@
#define AT803X_PSSR 0x11 /*PHY-Specific Status Register*/
#define AT803X_PSSR_MR_AN_COMPLETE 0x0200
-#define AT803X_DEBUG_REG_0 0x00
+#define AT803X_DEBUG_ANALOG_TEST_CTRL 0x00
#define QCA8327_DEBUG_MANU_CTRL_EN BIT(2)
#define QCA8337_DEBUG_MANU_CTRL_EN GENMASK(3, 2)
#define AT803X_DEBUG_RX_CLK_DLY_EN BIT(15)
-#define AT803X_DEBUG_REG_5 0x05
+#define AT803X_DEBUG_SYSTEM_CTRL_MODE 0x05
#define AT803X_DEBUG_TX_CLK_DLY_EN BIT(8)
#define AT803X_DEBUG_REG_HIB_CTRL 0x0b
@@ -284,25 +284,25 @@ static int at803x_read_page(struct phy_device *phydev)
static int at803x_enable_rx_delay(struct phy_device *phydev)
{
- return at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_0, 0,
+ return at803x_debug_reg_mask(phydev, AT803X_DEBUG_ANALOG_TEST_CTRL, 0,
AT803X_DEBUG_RX_CLK_DLY_EN);
}
static int at803x_enable_tx_delay(struct phy_device *phydev)
{
- return at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_5, 0,
+ return at803x_debug_reg_mask(phydev, AT803X_DEBUG_SYSTEM_CTRL_MODE, 0,
AT803X_DEBUG_TX_CLK_DLY_EN);
}
static int at803x_disable_rx_delay(struct phy_device *phydev)
{
- return at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_0,
+ return at803x_debug_reg_mask(phydev, AT803X_DEBUG_ANALOG_TEST_CTRL,
AT803X_DEBUG_RX_CLK_DLY_EN, 0);
}
static int at803x_disable_tx_delay(struct phy_device *phydev)
{
- return at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_5,
+ return at803x_debug_reg_mask(phydev, AT803X_DEBUG_SYSTEM_CTRL_MODE,
AT803X_DEBUG_TX_CLK_DLY_EN, 0);
}
@@ -1300,7 +1300,7 @@ static int qca83xx_config_init(struct phy_device *phydev)
switch (switch_revision) {
case 1:
/* For 100M waveform */
- at803x_debug_reg_write(phydev, AT803X_DEBUG_REG_0, 0x02ea);
+ at803x_debug_reg_write(phydev, AT803X_DEBUG_ANALOG_TEST_CTRL, 0x02ea);
/* Turn on Gigabit clock */
at803x_debug_reg_write(phydev, AT803X_DEBUG_REG_GREEN, 0x68a0);
break;
@@ -1311,7 +1311,7 @@ static int qca83xx_config_init(struct phy_device *phydev)
case 4:
phy_write_mmd(phydev, MDIO_MMD_PCS, MDIO_AZ_DEBUG, 0x803f);
at803x_debug_reg_write(phydev, AT803X_DEBUG_REG_GREEN, 0x6860);
- at803x_debug_reg_write(phydev, AT803X_DEBUG_REG_5, 0x2c46);
+ at803x_debug_reg_write(phydev, AT803X_DEBUG_SYSTEM_CTRL_MODE, 0x2c46);
at803x_debug_reg_write(phydev, AT803X_DEBUG_REG_3C, 0x6000);
break;
}
@@ -1322,7 +1322,7 @@ static int qca83xx_config_init(struct phy_device *phydev)
*/
if (phydev->drv->phy_id == QCA8327_A_PHY_ID ||
phydev->drv->phy_id == QCA8327_B_PHY_ID)
- at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_0,
+ at803x_debug_reg_mask(phydev, AT803X_DEBUG_ANALOG_TEST_CTRL,
QCA8327_DEBUG_MANU_CTRL_EN, 0);
/* Following original QCA sourcecode set port to prefer master */
@@ -1340,12 +1340,12 @@ static void qca83xx_link_change_notify(struct phy_device *phydev)
/* Set DAC Amplitude adjustment to +6% for 100m on link running */
if (phydev->state == PHY_RUNNING) {
if (phydev->speed == SPEED_100)
- at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_0,
+ at803x_debug_reg_mask(phydev, AT803X_DEBUG_ANALOG_TEST_CTRL,
QCA8327_DEBUG_MANU_CTRL_EN,
QCA8327_DEBUG_MANU_CTRL_EN);
} else {
/* Reset DAC Amplitude adjustment */
- at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_0,
+ at803x_debug_reg_mask(phydev, AT803X_DEBUG_ANALOG_TEST_CTRL,
QCA8327_DEBUG_MANU_CTRL_EN, 0);
}
}
--
2.32.0
next prev parent reply other threads:[~2021-10-06 22:36 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-06 22:35 [net-next PATCH 00/13] Multiple improvement for qca8337 switch Ansuel Smith
2021-10-06 22:35 ` [net-next PATCH 01/13] drivers: net: phy: at803x: fix resume for QCA8327 phy Ansuel Smith
2021-10-07 0:04 ` Andrew Lunn
2021-10-06 22:35 ` [net-next PATCH 02/13] drivers: net: phy: at803x: add DAC amplitude fix for 8327 phy Ansuel Smith
2021-10-06 23:59 ` Andrew Lunn
2021-10-07 22:07 ` Ansuel Smith
2021-10-06 22:35 ` [net-next PATCH 03/13] drivers: net: phy: at803x: enable prefer master for 83xx internal phy Ansuel Smith
2021-10-06 23:55 ` Andrew Lunn
2021-10-06 22:35 ` Ansuel Smith [this message]
2021-10-06 23:51 ` [net-next PATCH 04/13] drivers: net: phy: at803x: better describe debug regs Andrew Lunn
2021-10-06 22:35 ` [net-next PATCH 05/13] net: dsa: qca8k: add mac_power_sel support Ansuel Smith
2021-10-06 22:35 ` [net-next PATCH 06/13] Documentation: devicetree: net: dsa: qca8k: document rgmii_1_8v bindings Ansuel Smith
2021-10-07 0:09 ` Andrew Lunn
2021-10-07 13:25 ` Ansuel Smith
2021-10-07 16:47 ` Andrew Lunn
2021-10-07 17:09 ` Ansuel Smith
2021-10-06 22:35 ` [net-next PATCH 07/13] net: dsa: qca8k: add support for mac6_exchange, sgmii falling edge Ansuel Smith
2021-10-07 0:14 ` Andrew Lunn
2021-10-07 13:26 ` Ansuel Smith
2021-10-07 16:49 ` Andrew Lunn
2021-10-07 17:09 ` Ansuel Smith
2021-10-10 11:40 ` Vladimir Oltean
2021-10-10 12:00 ` Ansuel Smith
2021-10-06 22:35 ` [net-next PATCH 08/13] dt-bindings: net: dsa: qca8k: Add MAC swap and clock phase properties Ansuel Smith
2021-10-06 22:35 ` [net-next PATCH 09/13] net: dsa: qca8k: check rgmii also on port 6 if exchanged Ansuel Smith
2021-10-07 0:24 ` Andrew Lunn
2021-10-07 13:31 ` Ansuel Smith
2021-10-07 18:12 ` Florian Fainelli
2021-10-06 22:36 ` [net-next PATCH 10/13] net: dsa: qca8k: add explicit SGMII PLL enable Ansuel Smith
2021-10-07 0:29 ` Andrew Lunn
2021-10-07 13:35 ` Ansuel Smith
2021-10-07 18:05 ` Andrew Lunn
2021-10-07 18:26 ` Ansuel Smith
2021-10-06 22:36 ` [net-next PATCH 11/13] devicetree: net: dsa: qca8k: Document qca,sgmii-enable-pll Ansuel Smith
2021-10-07 0:31 ` Andrew Lunn
2021-10-07 13:37 ` Ansuel Smith
2021-10-06 22:36 ` [net-next PATCH 12/13] drivers: net: dsa: qca8k: add support for pws config reg Ansuel Smith
2021-10-07 0:41 ` Andrew Lunn
2021-10-07 13:45 ` Ansuel Smith
2021-10-07 18:25 ` Andrew Lunn
2021-10-06 22:36 ` [net-next PATCH 13/13] Documentation: devicetree: net: dsa: qca8k: document open drain binding Ansuel Smith
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20211006223603.18858-5-ansuelsmth@gmail.com \
--to=ansuelsmth@gmail.com \
--cc=andrew@lunn.ch \
--cc=davem@davemloft.net \
--cc=devicetree@vger.kernel.org \
--cc=f.fainelli@gmail.com \
--cc=hkallweit1@gmail.com \
--cc=kuba@kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux@armlinux.org.uk \
--cc=netdev@vger.kernel.org \
--cc=olteanv@gmail.com \
--cc=robh+dt@kernel.org \
--cc=vivien.didelot@gmail.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).