From: Ansuel Smith <ansuelsmth@gmail.com>
To: Andrew Lunn <andrew@lunn.ch>,
Vivien Didelot <vivien.didelot@gmail.com>,
Florian Fainelli <f.fainelli@gmail.com>,
Vladimir Oltean <olteanv@gmail.com>,
"David S. Miller" <davem@davemloft.net>,
Jakub Kicinski <kuba@kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Heiner Kallweit <hkallweit1@gmail.com>,
Russell King <linux@armlinux.org.uk>,
Ansuel Smith <ansuelsmth@gmail.com>,
netdev@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Cc: Matthew Hagan <mnhagan88@gmail.com>
Subject: [net-next PATCH 07/13] net: dsa: qca8k: add support for mac6_exchange, sgmii falling edge
Date: Thu, 7 Oct 2021 00:35:57 +0200 [thread overview]
Message-ID: <20211006223603.18858-8-ansuelsmth@gmail.com> (raw)
In-Reply-To: <20211006223603.18858-1-ansuelsmth@gmail.com>
Some device set the switch to exchange the mac0 port with mac6 port. Add
support for this in the qca8k driver. Also add support for SGMII rx/tx
clock falling edge. This is only present for pad0, pad5 and pad6 have
these bit reserved from Documentation.
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
---
drivers/net/dsa/qca8k.c | 33 +++++++++++++++++++++++++++++++++
drivers/net/dsa/qca8k.h | 3 +++
2 files changed, 36 insertions(+)
diff --git a/drivers/net/dsa/qca8k.c b/drivers/net/dsa/qca8k.c
index 5bce7ac4dea7..3a040a3ed58e 100644
--- a/drivers/net/dsa/qca8k.c
+++ b/drivers/net/dsa/qca8k.c
@@ -973,6 +973,34 @@ qca8k_setup_mac_pwr_sel(struct qca8k_priv *priv)
return ret;
}
+static int
+qca8k_setup_port0_pad_ctrl_reg(struct qca8k_priv *priv)
+{
+ struct device_node *node = priv->dev->of_node;
+ u32 mask = 0;
+ int ret = 0;
+
+ /* Swap MAC0-MAC6 */
+ if (of_property_read_bool(node, "qca,mac6-exchange"))
+ mask |= QCA8K_PORT0_PAD_CTRL_MAC06_EXCHG;
+
+ /* SGMII Clock phase configuration */
+ if (of_property_read_bool(node, "qca,sgmii-rxclk-falling-edge"))
+ mask |= QCA8K_PORT0_PAD_SGMII_RXCLK_FALLING_EDGE;
+
+ if (of_property_read_bool(node, "qca,sgmii-txclk-falling-edge"))
+ mask |= QCA8K_PORT0_PAD_SGMII_TXCLK_FALLING_EDGE;
+
+ if (mask)
+ ret = qca8k_rmw(priv, QCA8K_REG_PORT0_PAD_CTRL,
+ QCA8K_PORT0_PAD_CTRL_MAC06_EXCHG |
+ QCA8K_PORT0_PAD_SGMII_RXCLK_FALLING_EDGE |
+ QCA8K_PORT0_PAD_SGMII_TXCLK_FALLING_EDGE,
+ mask);
+
+ return ret;
+}
+
static int
qca8k_setup(struct dsa_switch *ds)
{
@@ -1006,6 +1034,11 @@ qca8k_setup(struct dsa_switch *ds)
if (ret)
return ret;
+ /* Configure additional PORT0_PAD_CTRL properties */
+ ret = qca8k_setup_port0_pad_ctrl_reg(priv);
+ if (ret)
+ return ret;
+
/* Enable CPU Port */
ret = qca8k_reg_set(priv, QCA8K_REG_GLOBAL_FW_CTRL0,
QCA8K_GLOBAL_FW_CTRL0_CPU_PORT_EN);
diff --git a/drivers/net/dsa/qca8k.h b/drivers/net/dsa/qca8k.h
index fc7db94cc0c9..3fded69a6839 100644
--- a/drivers/net/dsa/qca8k.h
+++ b/drivers/net/dsa/qca8k.h
@@ -35,6 +35,9 @@
#define QCA8K_MASK_CTRL_DEVICE_ID_MASK GENMASK(15, 8)
#define QCA8K_MASK_CTRL_DEVICE_ID(x) ((x) >> 8)
#define QCA8K_REG_PORT0_PAD_CTRL 0x004
+#define QCA8K_PORT0_PAD_CTRL_MAC06_EXCHG BIT(31)
+#define QCA8K_PORT0_PAD_SGMII_RXCLK_FALLING_EDGE BIT(19)
+#define QCA8K_PORT0_PAD_SGMII_TXCLK_FALLING_EDGE BIT(18)
#define QCA8K_REG_PORT5_PAD_CTRL 0x008
#define QCA8K_REG_PORT6_PAD_CTRL 0x00c
#define QCA8K_PORT_PAD_RGMII_EN BIT(26)
--
2.32.0
next prev parent reply other threads:[~2021-10-06 22:36 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-06 22:35 [net-next PATCH 00/13] Multiple improvement for qca8337 switch Ansuel Smith
2021-10-06 22:35 ` [net-next PATCH 01/13] drivers: net: phy: at803x: fix resume for QCA8327 phy Ansuel Smith
2021-10-07 0:04 ` Andrew Lunn
2021-10-06 22:35 ` [net-next PATCH 02/13] drivers: net: phy: at803x: add DAC amplitude fix for 8327 phy Ansuel Smith
2021-10-06 23:59 ` Andrew Lunn
2021-10-07 22:07 ` Ansuel Smith
2021-10-06 22:35 ` [net-next PATCH 03/13] drivers: net: phy: at803x: enable prefer master for 83xx internal phy Ansuel Smith
2021-10-06 23:55 ` Andrew Lunn
2021-10-06 22:35 ` [net-next PATCH 04/13] drivers: net: phy: at803x: better describe debug regs Ansuel Smith
2021-10-06 23:51 ` Andrew Lunn
2021-10-06 22:35 ` [net-next PATCH 05/13] net: dsa: qca8k: add mac_power_sel support Ansuel Smith
2021-10-06 22:35 ` [net-next PATCH 06/13] Documentation: devicetree: net: dsa: qca8k: document rgmii_1_8v bindings Ansuel Smith
2021-10-07 0:09 ` Andrew Lunn
2021-10-07 13:25 ` Ansuel Smith
2021-10-07 16:47 ` Andrew Lunn
2021-10-07 17:09 ` Ansuel Smith
2021-10-06 22:35 ` Ansuel Smith [this message]
2021-10-07 0:14 ` [net-next PATCH 07/13] net: dsa: qca8k: add support for mac6_exchange, sgmii falling edge Andrew Lunn
2021-10-07 13:26 ` Ansuel Smith
2021-10-07 16:49 ` Andrew Lunn
2021-10-07 17:09 ` Ansuel Smith
2021-10-10 11:40 ` Vladimir Oltean
2021-10-10 12:00 ` Ansuel Smith
2021-10-06 22:35 ` [net-next PATCH 08/13] dt-bindings: net: dsa: qca8k: Add MAC swap and clock phase properties Ansuel Smith
2021-10-06 22:35 ` [net-next PATCH 09/13] net: dsa: qca8k: check rgmii also on port 6 if exchanged Ansuel Smith
2021-10-07 0:24 ` Andrew Lunn
2021-10-07 13:31 ` Ansuel Smith
2021-10-07 18:12 ` Florian Fainelli
2021-10-06 22:36 ` [net-next PATCH 10/13] net: dsa: qca8k: add explicit SGMII PLL enable Ansuel Smith
2021-10-07 0:29 ` Andrew Lunn
2021-10-07 13:35 ` Ansuel Smith
2021-10-07 18:05 ` Andrew Lunn
2021-10-07 18:26 ` Ansuel Smith
2021-10-06 22:36 ` [net-next PATCH 11/13] devicetree: net: dsa: qca8k: Document qca,sgmii-enable-pll Ansuel Smith
2021-10-07 0:31 ` Andrew Lunn
2021-10-07 13:37 ` Ansuel Smith
2021-10-06 22:36 ` [net-next PATCH 12/13] drivers: net: dsa: qca8k: add support for pws config reg Ansuel Smith
2021-10-07 0:41 ` Andrew Lunn
2021-10-07 13:45 ` Ansuel Smith
2021-10-07 18:25 ` Andrew Lunn
2021-10-06 22:36 ` [net-next PATCH 13/13] Documentation: devicetree: net: dsa: qca8k: document open drain binding Ansuel Smith
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