From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id F1600C433EF for ; Mon, 18 Oct 2021 13:33:08 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id DC4D7613A1 for ; Mon, 18 Oct 2021 13:33:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233125AbhJRNfR (ORCPT ); Mon, 18 Oct 2021 09:35:17 -0400 Received: from foss.arm.com ([217.140.110.172]:37726 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232523AbhJRNdt (ORCPT ); Mon, 18 Oct 2021 09:33:49 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id DF88911B3; Mon, 18 Oct 2021 06:31:37 -0700 (PDT) Received: from bogus (unknown [10.57.25.56]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 0BFB93F73D; Mon, 18 Oct 2021 06:31:30 -0700 (PDT) Date: Mon, 18 Oct 2021 14:31:27 +0100 From: Sudeep Holla To: Rob Herring Cc: Russell King , James Morse , Sudeep Holla , Catalin Marinas , Will Deacon , Guo Ren , Jonas Bonn , Stefan Kristiansson , Stafford Horne , Michael Ellerman , Paul Walmsley , Palmer Dabbelt , Albert Ou , Yoshinori Sato , Rich Felker , x86@kernel.org, Greg Kroah-Hartman , Florian Fainelli , Ray Jui , Scott Branden , bcm-kernel-feedback-list@broadcom.com, Benjamin Herrenschmidt , Paul Mackerras , Thomas Gleixner , Ingo Molnar , Borislav Petkov , "H. Peter Anvin" , "Rafael J. Wysocki" , Frank Rowand , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-csky@vger.kernel.org, openrisc@lists.librecores.org, linuxppc-dev@lists.ozlabs.org, linux-riscv@lists.infradead.org, linux-sh@vger.kernel.org, devicetree@vger.kernel.org Subject: Re: [PATCH 12/12] cacheinfo: Set cache 'id' based on DT data Message-ID: <20211018133127.4oenrvzxwzn73s3k@bogus> References: <20211006164332.1981454-1-robh@kernel.org> <20211006164332.1981454-13-robh@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20211006164332.1981454-13-robh@kernel.org> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Wed, Oct 06, 2021 at 11:43:32AM -0500, Rob Herring wrote: > Use the minimum CPU h/w id of the CPUs associated with the cache for the > cache 'id'. This will provide a stable id value for a given system. As > we need to check all possible CPUs, we can't use the shared_cpu_map > which is just online CPUs. As there's not a cache to CPUs mapping in DT, > we have to walk all CPU nodes and then walk cache levels. > Acked-by: Sudeep Holla -- Regards, Sudeep