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From: Horatiu Vultur <horatiu.vultur@microchip.com>
To: Kavyasree Kotagiri <kavyasree.kotagiri@microchip.com>
Cc: <robh+dt@kernel.org>, <mturquette@baylibre.com>,
	<sboyd@kernel.org>, <nicolas.ferre@microchip.com>,
	<linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>,
	<linux-clk@vger.kernel.org>, <UNGLinuxDriver@microchip.com>,
	<Eugen.Hristev@microchip.com>, <Manohar.Puri@microchip.com>
Subject: Re: [PATCH v8 3/3] clk: lan966x: Add lan966x SoC clock driver
Date: Mon, 18 Oct 2021 22:09:15 +0200	[thread overview]
Message-ID: <20211018200915.5jdgf6lqrs633vck@soft-dev3-1.localhost> (raw)
In-Reply-To: <20211008082635.31774-4-kavyasree.kotagiri@microchip.com>

The 10/08/2021 13:56, Kavyasree Kotagiri wrote:
> This adds Generic Clock Controller driver for lan966x SoC.

Hi Kavya,

> 
> +#define DIV_MAX		256
> +
> +static const char *clk_names[N_CLOCKS] = {
> +	"qspi0", "qspi1", "qspi2", "sdmmc0",
> +	"pi", "mcan0", "mcan1", "flexcom0",
> +	"flexcom1", "flexcom2", "flexcom3",
> +	"flexcom4", "timer", "usb_refclk",
> +};

Aren't these names a little bit generic, especially 'timer'?
The problem that I am seeing, if there is another clock driver that
register a clock with the same name, then this will fail. Here is the
check for this[1]

> +
> +static int lan966x_clk_probe(struct platform_device *pdev)
> +{
> +	struct clk_hw_onecell_data *hw_data;
> +	struct device *dev = &pdev->dev;
> +	int i;
> +
> +	hw_data = devm_kzalloc(dev, sizeof(*hw_data), GFP_KERNEL);

Is this correct? Shouldn't be

devm_kzalloc(dev, struct_size(hw_data, hws, N_CLOCKS), GFP_KERNEL);

> +	if (!hw_data)
> +		return -ENOMEM;
> +
> +	base = devm_platform_ioremap_resource(pdev, 0);
> +	if (IS_ERR(base))
> +		return PTR_ERR(base);
> +
> +	init.ops = &lan966x_gck_ops;
> +
> +	hw_data->num = N_CLOCKS;
> +
> +	for (i = 0; i < N_CLOCKS; i++) {
> +		init.name = clk_names[i];
> +		hw_data->hws[i] = lan966x_gck_clk_register(dev, i);
> +		if (IS_ERR(hw_data->hws[i])) {
> +			dev_err(dev, "failed to register %s clock\n",
> +				init.name);
> +			return PTR_ERR(hw_data->hws[i]);
> +		}
> +	}
> +
> +	return devm_of_clk_add_hw_provider(dev, of_clk_hw_onecell_get, hw_data);
> +}
> +
> +static const struct of_device_id lan966x_clk_dt_ids[] = {
> +	{ .compatible = "microchip,lan966x-gck", },
> +	{ }
> +};
> +MODULE_DEVICE_TABLE(of, lan966x_clk_dt_ids);
> +
> +static struct platform_driver lan966x_clk_driver = {
> +	.probe  = lan966x_clk_probe,
> +	.driver = {
> +		.name = "lan966x-clk",
> +		.of_match_table = lan966x_clk_dt_ids,
> +	},
> +};
> +builtin_platform_driver(lan966x_clk_driver);
> +
> +MODULE_AUTHOR("Kavyasree Kotagiri <kavyasree.kotagiri@microchip.com>");
> +MODULE_DESCRIPTION("LAN966X clock driver");
> +MODULE_LICENSE("GPL v2");
> -- 
> 2.17.1
> 

[1] https://elixir.bootlin.com/linux/latest/source/drivers/clk/clk.c#L3423

-- 
/Horatiu

      reply	other threads:[~2021-10-18 20:07 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-08  8:26 [PATCH v8 0/3] Add driver for lan966x Generic Clock Controller Kavyasree Kotagiri
2021-10-08  8:26 ` [PATCH v8 1/3] dt-bindings: clock: lan966x: Add binding includes for lan966x SoC clock IDs Kavyasree Kotagiri
2021-10-18 11:55   ` Nicolas Ferre
2021-10-08  8:26 ` [PATCH v8 2/3] dt-bindings: clock: lan966x: Add LAN966X Clock Controller Kavyasree Kotagiri
2021-10-18 11:55   ` Nicolas Ferre
2021-10-08  8:26 ` [PATCH v8 3/3] clk: lan966x: Add lan966x SoC clock driver Kavyasree Kotagiri
2021-10-18 20:09   ` Horatiu Vultur [this message]

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