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Tue, 19 Oct 2021 16:20:56 +0100 Envelope-to: anand.ashok.dumbre@xilinx.com, git@xilinx.com, michal.simek@xilinx.com, manish.narani@xilinx.com, linux-kernel@vger.kernel.org, jic23@kernel.org, lars@metafoo.de, linux-iio@vger.kernel.org, pmeerw@pmeerw.net, devicetree@vger.kernel.org Received: from [10.71.188.1] (port=8251 helo=xiranandash40.xilinx.com) by smtp.xilinx.com with esmtp (Exim 4.90) (envelope-from ) id 1mcqv4-00030B-4o; Tue, 19 Oct 2021 16:20:50 +0100 From: Anand Ashok Dumbre To: , , , , , , , CC: Anand Ashok Dumbre , Manish Narani Subject: [PATCH v7 1/4] arm64: zynqmp: DT: Add Xilinx AMS node Date: Tue, 19 Oct 2021 16:20:45 +0100 Message-ID: <20211019152048.28983-2-anand.ashok.dumbre@xilinx.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20211019152048.28983-1-anand.ashok.dumbre@xilinx.com> References: <20211019152048.28983-1-anand.ashok.dumbre@xilinx.com> MIME-Version: 1.0 Content-Type: text/plain X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: e1d1bb89-6042-43ed-0bb6-08d99314101a X-MS-TrafficTypeDiagnostic: DM5PR0201MB3576: X-Microsoft-Antispam-PRVS: X-Auto-Response-Suppress: DR, RN, NRN, OOF, AutoReply X-MS-Oob-TLC-OOBClassifiers: OLM:3276; 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X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Oct 2021 15:21:02.6158 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e1d1bb89-6042-43ed-0bb6-08d99314101a X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c;Ip=[149.199.80.198];Helo=[xir-pvapexch01.xlnx.xilinx.com] X-MS-Exchange-CrossTenant-AuthSource: DM3NAM02FT058.eop-nam02.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM5PR0201MB3576 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The Xilinx AMS includes an ADC as well as on-chip sensors that can be used to sample external and monitor on-die operating conditions, such as temperature and supply voltage levels. Signed-off-by: Manish Narani Signed-off-by: Anand Ashok Dumbre --- arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 26 +++++++++++++++++++++++++- 1 file changed, 25 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi index 28dccb891a53..b12e0cd0adfd 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0+ +// SPDX-License-Identifier: GPL-2.0 /* * dts file for Xilinx ZynqMP * @@ -849,6 +849,30 @@ timeout-sec = <10>; }; + xilinx_ams: ams@ffa50000 { + compatible = "xlnx,zynqmp-ams"; + status = "disabled"; + interrupt-parent = <&gic>; + interrupts = <0 56 4>; + reg = <0x0 0xffa50000 0x0 0x800>; + #address-cells = <1>; + #size-cells = <1>; + #io-channel-cells = <1>; + ranges = <0 0 0xffa50800 0x800>; + + ams_ps: ams-ps@0 { + compatible = "xlnx,zynqmp-ams-ps"; + status = "disabled"; + reg = <0 0x400>; + }; + + ams_pl: ams-pl@400 { + compatible = "xlnx,zynqmp-ams-pl"; + status = "disabled"; + reg = <0x400 0x400>; + }; + }; + zynqmp_dpdma: dma-controller@fd4c0000 { compatible = "xlnx,zynqmp-dpdma"; status = "disabled"; -- 2.17.1