From: "Paweł Anikiel" <pan@semihalf.com>
To: arnd@arndb.de, olof@lixom.net, soc@kernel.org,
robh+dt@kernel.org, dinguyen@kernel.org
Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, upstream@semihalf.com,
mw@semihalf.com, ka@semihalf.com, jam@semihalf.com,
tn@semihalf.com, amstan@google.com,
"Paweł Anikiel" <pan@semihalf.com>
Subject: [PATCH v5 0/1] Add support for the Mercury+ AA1 module
Date: Thu, 21 Oct 2021 17:17:35 +0200 [thread overview]
Message-ID: <20211021151736.2096926-1-pan@semihalf.com> (raw)
The following patches add support for the Mercury+ AA1 with an
Arria 10 SoCFPGA.
This version is almost the same as v3, only difference is having
devicetree Makefile entries for arria10_* sorted.
v5:
* revert `move devicetree aliases to socfpga_arria10.dtsi`
v4:
* move devicetree aliases to socfpga_arria10.dtsi
* sort arria10 entries in arch/arm/boot/dts/Makefile
v3:
* replace i2c busno property with devicetree aliases
* reset controller patch added to Philipp Zabel's tree
v2:
* remove spi flash node
* rename memory and mdio nodes
* add gpio nodes
* add busno property to designware i2c driver
Paweł Anikiel (1):
dts: socfpga: Add Mercury+ AA1 devicetree
arch/arm/boot/dts/Makefile | 1 +
.../boot/dts/socfpga_arria10_mercury_aa1.dts | 112 ++++++++++++++++++
2 files changed, 113 insertions(+)
create mode 100644 arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dts
--
2.25.1
next reply other threads:[~2021-10-21 15:17 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-21 15:17 Paweł Anikiel [this message]
2021-10-21 15:17 ` [PATCH v5 1/1] dts: socfpga: Add Mercury+ AA1 devicetree Paweł Anikiel
2021-10-21 15:34 ` Arnd Bergmann
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