From: jae.hyun.yoo@intel.com
To: Rob Herring <robh+dt@kernel.org>, Corey Minyard <minyard@acm.org>,
Joel Stanley <joel@jms.id.au>, Andrew Jeffery <andrew@aj.id.au>,
Cedric Le Goater <clg@kaod.org>,
Haiyue Wang <haiyue.wang@linux.intel.com>,
Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com>
Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-aspeed@lists.ozlabs.org,
openipmi-developer@lists.sourceforge.net
Subject: [PATCH -next 1/4] ARM: dts: aspeed: add LCLK setting into LPC IBT node
Date: Mon, 1 Nov 2021 16:37:48 -0700 [thread overview]
Message-ID: <20211101233751.49222-2-jae.hyun.yoo@intel.com> (raw)
In-Reply-To: <20211101233751.49222-1-jae.hyun.yoo@intel.com>
From: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com>
Add LCLK clock setting into LPC IBT node to enable the LCLK by
individual LPC sub drivers.
Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com>
---
arch/arm/boot/dts/aspeed-g4.dtsi | 1 +
arch/arm/boot/dts/aspeed-g5.dtsi | 1 +
arch/arm/boot/dts/aspeed-g6.dtsi | 1 +
3 files changed, 3 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi
index b313a1cf5f73..f14dace34c5a 100644
--- a/arch/arm/boot/dts/aspeed-g4.dtsi
+++ b/arch/arm/boot/dts/aspeed-g4.dtsi
@@ -381,6 +381,7 @@ ibt: ibt@140 {
compatible = "aspeed,ast2400-ibt-bmc";
reg = <0x140 0x18>;
interrupts = <8>;
+ clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
status = "disabled";
};
diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi
index c7049454c7cb..d0cc4be2de59 100644
--- a/arch/arm/boot/dts/aspeed-g5.dtsi
+++ b/arch/arm/boot/dts/aspeed-g5.dtsi
@@ -507,6 +507,7 @@ ibt: ibt@140 {
compatible = "aspeed,ast2500-ibt-bmc";
reg = <0x140 0x18>;
interrupts = <8>;
+ clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
status = "disabled";
};
};
diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi
index 5106a424f1ce..465c3549fdc3 100644
--- a/arch/arm/boot/dts/aspeed-g6.dtsi
+++ b/arch/arm/boot/dts/aspeed-g6.dtsi
@@ -581,6 +581,7 @@ ibt: ibt@140 {
compatible = "aspeed,ast2600-ibt-bmc";
reg = <0x140 0x18>;
interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
status = "disabled";
};
};
--
2.25.1
next prev parent reply other threads:[~2021-11-01 23:18 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-01 23:37 [PATCH -next 0/4] Add LCLK control into Aspeed LPC sub drivers jae.hyun.yoo
2021-11-01 23:36 ` Joel Stanley
2021-11-02 12:22 ` Corey Minyard
2021-11-02 16:38 ` Jae Hyun Yoo
2021-11-03 0:04 ` Zev Weiss
2021-11-03 0:17 ` Jae Hyun Yoo
2021-11-03 0:30 ` Zev Weiss
2021-11-03 0:54 ` Jae Hyun Yoo
2021-11-03 1:09 ` Zev Weiss
2021-11-03 15:56 ` Jae Hyun Yoo
2021-11-04 1:48 ` Zev Weiss
2021-11-04 16:09 ` Jae Hyun Yoo
2021-11-01 23:37 ` jae.hyun.yoo [this message]
2021-11-01 23:33 ` [PATCH -next 1/4] ARM: dts: aspeed: add LCLK setting into LPC IBT node Joel Stanley
2021-11-01 23:48 ` Jae Hyun Yoo
2021-11-01 23:52 ` Joel Stanley
2021-11-01 23:59 ` Jae Hyun Yoo
2021-11-02 22:21 ` Andrew Jeffery
2021-11-01 23:37 ` [PATCH -next 2/4] ipmi: bt: add clock control logic jae.hyun.yoo
2021-11-01 23:32 ` Joel Stanley
2021-11-02 9:35 ` Cédric Le Goater
2021-11-02 16:36 ` Jae Hyun Yoo
2021-11-02 22:14 ` Andrew Jeffery
2021-11-01 23:37 ` [PATCH -next 3/4] ARM: dts: aspeed: add LCLK setting into LPC KCS nodes jae.hyun.yoo
2021-11-01 23:34 ` Joel Stanley
2021-11-02 22:22 ` Andrew Jeffery
2021-11-03 16:15 ` Jae Hyun Yoo
2021-11-01 23:37 ` [PATCH -next 4/4] ipmi: kcs_bmc_aspeed: add clock control logic jae.hyun.yoo
2021-11-01 23:33 ` Joel Stanley
2021-11-02 3:15 ` ChiaWei Wang
2021-11-02 3:28 ` Joel Stanley
2021-11-02 16:35 ` Jae Hyun Yoo
2021-11-03 1:55 ` ChiaWei Wang
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