From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C07E5C43219 for ; Tue, 9 Nov 2021 22:29:47 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id AE60761208 for ; Tue, 9 Nov 2021 22:29:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344559AbhKIWcc (ORCPT ); Tue, 9 Nov 2021 17:32:32 -0500 Received: from mail.kernel.org ([198.145.29.99]:50982 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344656AbhKIWac (ORCPT ); Tue, 9 Nov 2021 17:30:32 -0500 Received: by mail.kernel.org (Postfix) with ESMTPSA id 05F2E61A7D; Tue, 9 Nov 2021 22:20:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1636496452; bh=ruXfzQqjoIa2djel2qhER3+u6sPgmIGgzuYVZDG7ax8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=D8o+utalU1TzSAbxuUbdtYW6xyAM4mlKTukETWuaKaXhcJh2yZeYI0LLdElwaQ4E6 FwqZtAS2WuXhESGv6Q8Bs/x9RXaOkmniteioZBYp0nroo21WUlcTq0LEXQaIP8A6C+ NbM0tOmYLoL/ocIlHzwT4ckh36l++qG7jWJKo0LKMD8WEW+U55v5+qD/MuQJGkLDUI UjOhkHTqHDWT6tAATUcgp7tAWAqj+P9ejMGfpO3sbCaoJ4vjbcupqEhX80V+xhj/4U mcylrX4ZKdu2nGZIWqqRoeDZAaUU1w9dlDlVeYEABL1VXVjCINTH9egXFZwJAdEz2w TRBk2C8kaz0MA== From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Stephan Gerhold , Bjorn Andersson , Sasha Levin , robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org, catalin.marinas@arm.com, will.deacon@arm.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH AUTOSEL 5.14 68/75] arm64: dts: qcom: msm8916: Add CPU ACC and SAW/SPM Date: Tue, 9 Nov 2021 17:18:58 -0500 Message-Id: <20211109221905.1234094-68-sashal@kernel.org> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211109221905.1234094-1-sashal@kernel.org> References: <20211109221905.1234094-1-sashal@kernel.org> MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Stephan Gerhold [ Upstream commit a22f9a766e1dc61f8f6ee2edfe83d4d23d78e059 ] Add the device tree nodes necessary for SMP bring-up and cpuidle without PSCI on ARM32. The hardware is typically controlled by the PSCI implementation in the TrustZone firmware and is therefore marked as status = "reserved" by default (from the device tree specification): "Indicates that the device is operational, but should not be used. Typically this is used for devices that are controlled by another software component, such as platform firmware." Since this is part of the MSM8916 SoC it should be added to msm8916.dtsi but in practice these nodes should only get enabled via an extra include on ARM32. This is necessary for some devices with signed firmware which is missing both ARM64 and PSCI support and can therefore only boot ARM32 kernels. Signed-off-by: Stephan Gerhold Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20211004204955.21077-13-stephan@gerhold.net Signed-off-by: Sasha Levin --- arch/arm64/boot/dts/qcom/msm8916.dtsi | 56 +++++++++++++++++++++++++++ 1 file changed, 56 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi index fa26d3871e00a..3c303ce492fcb 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -124,6 +124,8 @@ #cooling-cells = <2>; power-domains = <&CPU_PD0>; power-domain-names = "psci"; + qcom,acc = <&cpu0_acc>; + qcom,saw = <&cpu0_saw>; }; CPU1: cpu@1 { @@ -137,6 +139,8 @@ #cooling-cells = <2>; power-domains = <&CPU_PD1>; power-domain-names = "psci"; + qcom,acc = <&cpu1_acc>; + qcom,saw = <&cpu1_saw>; }; CPU2: cpu@2 { @@ -150,6 +154,8 @@ #cooling-cells = <2>; power-domains = <&CPU_PD2>; power-domain-names = "psci"; + qcom,acc = <&cpu2_acc>; + qcom,saw = <&cpu2_saw>; }; CPU3: cpu@3 { @@ -163,6 +169,8 @@ #cooling-cells = <2>; power-domains = <&CPU_PD3>; power-domain-names = "psci"; + qcom,acc = <&cpu3_acc>; + qcom,saw = <&cpu3_saw>; }; L2_0: l2-cache { @@ -1844,6 +1852,54 @@ status = "disabled"; }; }; + + cpu0_acc: power-manager@b088000 { + compatible = "qcom,msm8916-acc"; + reg = <0x0b088000 0x1000>; + status = "reserved"; /* Controlled by PSCI firmware */ + }; + + cpu0_saw: power-manager@b089000 { + compatible = "qcom,msm8916-saw2-v3.0-cpu", "qcom,saw2"; + reg = <0x0b089000 0x1000>; + status = "reserved"; /* Controlled by PSCI firmware */ + }; + + cpu1_acc: power-manager@b098000 { + compatible = "qcom,msm8916-acc"; + reg = <0x0b098000 0x1000>; + status = "reserved"; /* Controlled by PSCI firmware */ + }; + + cpu1_saw: power-manager@b099000 { + compatible = "qcom,msm8916-saw2-v3.0-cpu", "qcom,saw2"; + reg = <0x0b099000 0x1000>; + status = "reserved"; /* Controlled by PSCI firmware */ + }; + + cpu2_acc: power-manager@b0a8000 { + compatible = "qcom,msm8916-acc"; + reg = <0x0b0a8000 0x1000>; + status = "reserved"; /* Controlled by PSCI firmware */ + }; + + cpu2_saw: power-manager@b0a9000 { + compatible = "qcom,msm8916-saw2-v3.0-cpu", "qcom,saw2"; + reg = <0x0b0a9000 0x1000>; + status = "reserved"; /* Controlled by PSCI firmware */ + }; + + cpu3_acc: power-manager@b0b8000 { + compatible = "qcom,msm8916-acc"; + reg = <0x0b0b8000 0x1000>; + status = "reserved"; /* Controlled by PSCI firmware */ + }; + + cpu3_saw: power-manager@b0b9000 { + compatible = "qcom,msm8916-saw2-v3.0-cpu", "qcom,saw2"; + reg = <0x0b0b9000 0x1000>; + status = "reserved"; /* Controlled by PSCI firmware */ + }; }; thermal-zones { -- 2.33.0