[PATCH 1/5] dt-bindings: memory: tegra: Document #interconnect-cells property

[Thierry Reding <thierry.reding@gmail.com>]

From: Thierry Reding <treding@nvidia.com>

The #interconnect-cells properties are required to hook up memory
clients to the MC/EMC in interconnects properties. Add a description for
these properties.

Also, allow multiple reg and interrupt entries required by Tegra194 and
later.

Signed-off-by: Thierry Reding <treding@nvidia.com>
---
 .../memory-controllers/nvidia,tegra186-mc.yaml       | 12 +++++++++---
 1 file changed, 9 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml
index 611bda38d187..f6e4af4e86cf 100644
--- a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml
+++ b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml
@@ -33,10 +33,10 @@ properties:
           - nvidia,tegra194-mc
 
   reg:
-    maxItems: 1
+    maxItems: 3
 
   interrupts:
-    maxItems: 1
+    maxItems: 2
 
   "#address-cells":
     const: 2
@@ -48,6 +48,9 @@ properties:
 
   dma-ranges: true
 
+  "#interconnect-cells":
+    const: 1
+
 patternProperties:
   "^external-memory-controller@[0-9a-f]+$":
     description:
@@ -65,7 +68,7 @@ patternProperties:
               - nvidia,tegra194-emc
 
       reg:
-        maxItems: 1
+        maxItems: 2
 
       interrupts:
         maxItems: 1
@@ -78,6 +81,9 @@ patternProperties:
         items:
           - const: emc
 
+      "#interconnect-cells":
+        const: 0
+
       nvidia,bpmp:
         $ref: /schemas/types.yaml#/definitions/phandle
         description:
-- 
2.33.1