From: Florian Fainelli <f.fainelli@gmail.com>
To: bcm-kernel-feedback-list@broadcom.com,
linux-arm-kernel@lists.infradead.org
Cc: Jim Quinlan <jim2101024@gmail.com>,
Rob Herring <robh+dt@kernel.org>,
Nicolas Saenz Julienne <nsaenz@kernel.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@vger.kernel.org>,
"moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE"
<linux-rpi-kernel@lists.infradead.org>,
open list <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] ARM: dts: bcm2711: Fix PCIe interrupts
Date: Mon, 15 Nov 2021 09:32:34 -0800 [thread overview]
Message-ID: <20211115173234.489160-1-f.fainelli@gmail.com> (raw)
In-Reply-To: <20211029210927.36800-1-f.fainelli@gmail.com>
On Fri, 29 Oct 2021 14:09:26 -0700, Florian Fainelli <f.fainelli@gmail.com> wrote:
> The PCIe host bridge has two interrupt lines, one that goes towards it
> PCIE_INTR2 second level interrupt controller and one for its MSI second
> level interrupt controller. The first interrupt line is not currently
> managed by the driver, which is why it was not a functional problem.
>
> The interrupt-map property was also only listing the PCI_INTA interrupts
> when there are also the INTB, C and D.
>
> Reported-by: Jim Quinlan <jim2101024@gmail.com>
> Fixes: d5c8dc0d4c88 ("ARM: dts: bcm2711: Enable PCIe controller")
> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
> ---
Applied to https://github.com/Broadcom/stblinux/commits/devicetree/fixes, thanks!
--
Florian
prev parent reply other threads:[~2021-11-16 2:01 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-29 21:09 [PATCH] ARM: dts: bcm2711: Fix PCIe interrupts Florian Fainelli
2021-11-15 17:32 ` Florian Fainelli [this message]
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