From: Boris Brezillon <boris.brezillon@collabora.com>
To: Miquel Raynal <miquel.raynal@bootlin.com>
Cc: Richard Weinberger <richard@nod.at>,
Vignesh Raghavendra <vigneshr@ti.com>,
Tudor Ambarus <Tudor.Ambarus@microchip.com>,
Pratyush Yadav <p.yadav@ti.com>, Michael Walle <michael@walle.cc>,
<linux-mtd@lists.infradead.org>, Rob Herring <robh+dt@kernel.org>,
<devicetree@vger.kernel.org>, Mark Brown <broonie@kernel.org>,
<linux-spi@vger.kernel.org>,
Xiangsheng Hou <Xiangsheng.Hou@mediatek.com>,
Julien Su <juliensu@mxic.com.tw>,
Jaime Liao <jaimeliao@mxic.com.tw>,
Boris Brezillon <bbrezillon@kernel.org>,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Subject: Re: [PATCH v2 15/20] mtd: spinand: Create direct mapping descriptors for ECC operations
Date: Fri, 26 Nov 2021 15:13:52 +0100 [thread overview]
Message-ID: <20211126151352.3bdd2c1a@collabora.com> (raw)
In-Reply-To: <20211126113924.310459-16-miquel.raynal@bootlin.com>
On Fri, 26 Nov 2021 12:39:19 +0100
Miquel Raynal <miquel.raynal@bootlin.com> wrote:
> In order for pipelined ECC engines to be able to enable/disable the ECC
> engine only when needed and avoid races when future parallel-operations
> will be supported, we need to provide the information about the use of
> the ECC engine in the direct mapping hooks. As direct mapping
> configurations are meant to be static, it is best to create two new
> mappings: one for regular 'raw' accesses and one for accesses involving
> correction. It is up to the driver to use or not the new ECC enable
> boolean contained in the spi-mem operation.
>
> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
> ---
> drivers/mtd/nand/spi/core.c | 28 ++++++++++++++++++++++++++--
> include/linux/mtd/spinand.h | 2 ++
> include/linux/spi/spi-mem.h | 3 +++
I'd split that patch in 2: one adding the ecc_en field to spi_mem_op
and the other one using it in spinand.
> 3 files changed, 31 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
> index 7027c09925e2..10ccffb6bf0d 100644
> --- a/drivers/mtd/nand/spi/core.c
> +++ b/drivers/mtd/nand/spi/core.c
> @@ -381,7 +381,10 @@ static int spinand_read_from_cache_op(struct spinand_device *spinand,
> }
> }
>
> - rdesc = spinand->dirmaps[req->pos.plane].rdesc;
> + if (req->mode == MTD_OPS_RAW)
> + rdesc = spinand->dirmaps[req->pos.plane].rdesc;
> + else
> + rdesc = spinand->dirmaps[req->pos.plane].rdesc_ecc;
>
> while (nbytes) {
> ret = spi_mem_dirmap_read(rdesc, column, nbytes, buf);
> @@ -452,7 +455,10 @@ static int spinand_write_to_cache_op(struct spinand_device *spinand,
> req->ooblen);
> }
>
> - wdesc = spinand->dirmaps[req->pos.plane].wdesc;
> + if (req->mode == MTD_OPS_RAW)
> + wdesc = spinand->dirmaps[req->pos.plane].wdesc;
> + else
> + wdesc = spinand->dirmaps[req->pos.plane].wdesc_ecc;
>
> while (nbytes) {
> ret = spi_mem_dirmap_write(wdesc, column, nbytes, buf);
> @@ -866,6 +872,24 @@ static int spinand_create_dirmap(struct spinand_device *spinand,
>
> spinand->dirmaps[plane].rdesc = desc;
>
> + info.op_tmpl = *spinand->op_templates.update_cache;
> + info.op_tmpl.ecc_en = true;
> + desc = devm_spi_mem_dirmap_create(&spinand->spimem->spi->dev,
> + spinand->spimem, &info);
> + if (IS_ERR(desc))
> + return PTR_ERR(desc);
> +
> + spinand->dirmaps[plane].wdesc_ecc = desc;
> +
> + info.op_tmpl = *spinand->op_templates.read_cache;
> + info.op_tmpl.ecc_en = true;
> + desc = devm_spi_mem_dirmap_create(&spinand->spimem->spi->dev,
> + spinand->spimem, &info);
> + if (IS_ERR(desc))
> + return PTR_ERR(desc);
> +
> + spinand->dirmaps[plane].rdesc_ecc = desc;
> +
Direct mappings are not free (they might reserve a piece of MMIO
address space depending on the spi-mem controller implementation), so
I'd recommend creating those mapping only when strictly needed, that
is, when dealing with a pipelined ECC.
> return 0;
> }
>
> diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h
> index 6988956b8492..3aa28240a77f 100644
> --- a/include/linux/mtd/spinand.h
> +++ b/include/linux/mtd/spinand.h
> @@ -389,6 +389,8 @@ struct spinand_info {
> struct spinand_dirmap {
> struct spi_mem_dirmap_desc *wdesc;
> struct spi_mem_dirmap_desc *rdesc;
> + struct spi_mem_dirmap_desc *wdesc_ecc;
> + struct spi_mem_dirmap_desc *rdesc_ecc;
> };
>
> /**
> diff --git a/include/linux/spi/spi-mem.h b/include/linux/spi/spi-mem.h
> index 85e2ff7b840d..3be594be24c0 100644
> --- a/include/linux/spi/spi-mem.h
> +++ b/include/linux/spi/spi-mem.h
> @@ -94,6 +94,7 @@ enum spi_mem_data_dir {
> * operation does not involve transferring data
> * @data.buf.in: input buffer (must be DMA-able)
> * @data.buf.out: output buffer (must be DMA-able)
> + * @ecc_en: error correction is required
> */
> struct spi_mem_op {
> struct {
> @@ -126,6 +127,8 @@ struct spi_mem_op {
> const void *out;
> } buf;
> } data;
> +
> + bool ecc_en;
> };
>
> #define SPI_MEM_OP(__cmd, __addr, __dummy, __data) \
next prev parent reply other threads:[~2021-11-26 14:16 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-26 11:39 [PATCH v2 00/20] External ECC engines & Macronix support Miquel Raynal
2021-11-26 11:39 ` [PATCH v2 01/20] dt-bindings: mtd: nand-controller: Fix the reg property description Miquel Raynal
2021-11-26 11:39 ` [PATCH v2 02/20] dt-bindings: mtd: nand-controller: Fix a comment in the examples Miquel Raynal
2021-11-26 11:39 ` [PATCH v2 03/20] dt-bindings: mtd: nand-chip: Create a NAND chip description Miquel Raynal
2021-11-27 23:13 ` Rob Herring
2021-12-01 23:20 ` Rob Herring
2021-11-26 11:39 ` [PATCH v2 04/20] dt-bindings: mtd: spi-nand: Convert spi-nand description file to yaml Miquel Raynal
2021-11-26 11:39 ` [PATCH v2 05/20] dt-bindings: vendor-prefixes: Clarify Macronix prefix Miquel Raynal
2021-11-26 11:39 ` [PATCH v2 06/20] dt-bindings: spi: mxic: The interrupt property is not mandatory Miquel Raynal
2021-11-26 11:39 ` [PATCH v2 07/20] dt-bindings: spi: mxic: Convert to yaml Miquel Raynal
2021-11-26 11:39 ` [PATCH v2 08/20] dt-bindings: spi: mxic: Document the nand-ecc-engine property Miquel Raynal
2021-11-26 11:39 ` [PATCH v2 09/20] dt-bindings: mtd: Describe Macronix NAND ECC engine Miquel Raynal
2021-11-26 11:39 ` [PATCH v2 10/20] mtd: spinand: macronix: Use random program load Miquel Raynal
2021-11-26 11:39 ` [PATCH v2 11/20] mtd: nand: ecc: Add infrastructure to support hardware engines Miquel Raynal
2021-11-26 11:39 ` [PATCH v2 12/20] mtd: nand: Add a new helper to retrieve the ECC context Miquel Raynal
2021-11-26 11:39 ` [PATCH v2 13/20] mtd: nand: mxic-ecc: Add Macronix external ECC engine support Miquel Raynal
2021-11-26 11:39 ` [PATCH v2 14/20] mtd: nand: mxic-ecc: Support SPI pipelined mode Miquel Raynal
2021-11-26 11:39 ` [PATCH v2 15/20] mtd: spinand: Create direct mapping descriptors for ECC operations Miquel Raynal
2021-11-26 14:13 ` Boris Brezillon [this message]
2021-11-26 14:42 ` Miquel Raynal
2021-11-26 14:47 ` Boris Brezillon
2021-11-26 14:51 ` Miquel Raynal
2021-11-26 11:39 ` [PATCH v2 16/20] spi: mxic: Fix the transmit path Miquel Raynal
2021-11-26 11:39 ` [PATCH v2 17/20] spi: mxic: Create a helper to configure the controller before an operation Miquel Raynal
2021-11-26 11:39 ` [PATCH v2 18/20] spi: mxic: Create a helper to ease the start of " Miquel Raynal
2021-11-26 11:39 ` [PATCH v2 19/20] spi: mxic: Add support for direct mapping Miquel Raynal
2021-11-26 11:39 ` [PATCH v2 20/20] spi: mxic: Add support for pipelined ECC operations Miquel Raynal
2021-11-26 21:15 ` kernel test robot
2021-11-27 7:49 ` kernel test robot
2021-11-26 13:37 ` [PATCH v2 00/20] External ECC engines & Macronix support Mark Brown
2021-11-26 14:10 ` Miquel Raynal
2021-11-26 14:13 ` Mark Brown
2021-11-29 9:50 ` Miquel Raynal
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