[PATCH v2 0/5] Stacked/parallel memories bindings

[PATCH v2 0/5] Stacked/parallel memories bindings

[Miquel Raynal]

Hello Rob, Mark, Tudor & Pratyush,

Now that the discussion has move forward, let met propose a second
version for these bindings.

Cheers,
Miquèl

Changes in v2:
* Dropped the dtc changes for now.
* Moved the properties in the device's nodes, not the controller's.
* Dropped the useless #address-cells change.
* Added a missing "minItems".
* Moved the new properties in the spi-controller.yaml file.
* Added an example using two stacked memories in the
  spi-controller.yaml file.
* Renamed the properties to drop the Xilinx prefix.
* Added a patch to fix the spi-nor jedec yaml file.

Miquel Raynal (5):
  spi: dt-bindings: Allow describing flashes with two CS
  dt-bindings: mtd: spi-nor: Allow external properties
  dt-bindings: mtd: spi-nor: Allow two CS per device
  spi: dt-bindings: Describe stacked/parallel memories modes
  spi: dt-bindings: Add an example with two stacked flashes

 .../bindings/mtd/jedec,spi-nor.yaml           |  5 ++--
 .../bindings/spi/spi-controller.yaml          | 30 ++++++++++++++++++-
 2 files changed, 32 insertions(+), 3 deletions(-)

-- 
2.27.0

[PATCH v2 1/5] spi: dt-bindings: Allow describing flashes with two CS

[Miquel Raynal]

The Xilinx QSPI controller has two advanced modes which allow the
controller to behave differently and consider two flashes as one single
storage.

One of these two modes is quite complex to support from a binding point
of view and is the dual parallel memories. In this mode, each byte of
data is stored in both devices: the even bits in one, the odd bits in
the other. The split is automatically handled by the QSPI controller and
is transparent for the user.

The other mode is simpler to support, it is called dual stacked
memories. The controller shares the same SPI bus but each of the devices
contain half of the data. Once in this mode, the controller does not
follow CS requests but instead internally wires the two CSlevels with
the value of the most significant address bit.

Supporting these two modes will involve core changes which include the
possibility of providing two CS for a single SPI device, and thus
changing the node name regular expression.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
 Documentation/devicetree/bindings/spi/spi-controller.yaml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/spi/spi-controller.yaml b/Documentation/devicetree/bindings/spi/spi-controller.yaml
index 8246891602e7..556c5ddc39d2 100644
--- a/Documentation/devicetree/bindings/spi/spi-controller.yaml
+++ b/Documentation/devicetree/bindings/spi/spi-controller.yaml
@@ -91,7 +91,7 @@ properties:
       - compatible
 
 patternProperties:
-  "^.*@[0-9a-f]+$":
+  "^.*@[0-9a-f]+,?[0-9a-f]*$":
     type: object
 
     properties:
-- 
2.27.0

[PATCH v2 2/5] dt-bindings: mtd: spi-nor: Allow external properties

[Miquel Raynal]

Setting "additionalProperties: false" will refuse any generic SPI
property while they should be of course authorized. In practice it looks
like many people used compatibles different than "jedec,spi-nor" in
order to workaround this limitation because otherwise no SPI property
could be used in the examples. Use "unevaluatedProperties: false"
instead to allow defined properties to be used. It is likely that at the
time of the conversion to yaml of the jedec file, the unevaluated
keyword was not yet introduced.

Fixes: 3ff9ee2a8890 ("dt-bindings: mtd: spi-nor: Convert to DT schema format")
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
 Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml b/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml
index ed590d7c6e37..81be0620b264 100644
--- a/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml
+++ b/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml
@@ -88,7 +88,7 @@ patternProperties:
   "^otp(-[0-9]+)?$":
     type: object
 
-additionalProperties: false
+unevaluatedProperties: false
 
 examples:
   - |
-- 
2.27.0

Re: [PATCH v2 2/5] dt-bindings: mtd: spi-nor: Allow external properties

[Rob Herring]

On Fri, Nov 26, 2021 at 05:34:47PM +0100, Miquel Raynal wrote:
> Setting "additionalProperties: false" will refuse any generic SPI
> property while they should be of course authorized. In practice it looks
> like many people used compatibles different than "jedec,spi-nor" in
> order to workaround this limitation because otherwise no SPI property
> could be used in the examples. Use "unevaluatedProperties: false"
> instead to allow defined properties to be used. It is likely that at the
> time of the conversion to yaml of the jedec file, the unevaluated
> keyword was not yet introduced.
> 
> Fixes: 3ff9ee2a8890 ("dt-bindings: mtd: spi-nor: Convert to DT schema format")
> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
> ---
>  Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml b/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml
> index ed590d7c6e37..81be0620b264 100644
> --- a/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml
> +++ b/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml
> @@ -88,7 +88,7 @@ patternProperties:
>    "^otp(-[0-9]+)?$":
>      type: object
>  
> -additionalProperties: false
> +unevaluatedProperties: false

This has no effect unless you have referenced some other schema here. 
The series I referenced will solve what your trying to solve I think.

Rob

Re: [PATCH v2 2/5] dt-bindings: mtd: spi-nor: Allow external properties

[Miquel Raynal]

Hi Rob,

robh@kernel.org wrote on Wed, 1 Dec 2021 18:05:41 -0600:

> On Fri, Nov 26, 2021 at 05:34:47PM +0100, Miquel Raynal wrote:
> > Setting "additionalProperties: false" will refuse any generic SPI
> > property while they should be of course authorized. In practice it looks
> > like many people used compatibles different than "jedec,spi-nor" in
> > order to workaround this limitation because otherwise no SPI property
> > could be used in the examples. Use "unevaluatedProperties: false"
> > instead to allow defined properties to be used. It is likely that at the
> > time of the conversion to yaml of the jedec file, the unevaluated
> > keyword was not yet introduced.
> > 
> > Fixes: 3ff9ee2a8890 ("dt-bindings: mtd: spi-nor: Convert to DT schema format")
> > Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
> > ---
> >  Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> > 
> > diff --git a/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml b/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml
> > index ed590d7c6e37..81be0620b264 100644
> > --- a/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml
> > +++ b/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml
> > @@ -88,7 +88,7 @@ patternProperties:
> >    "^otp(-[0-9]+)?$":
> >      type: object
> >  
> > -additionalProperties: false
> > +unevaluatedProperties: false  
> 
> This has no effect unless you have referenced some other schema here. 
> The series I referenced will solve what your trying to solve I think.

Maybe this is not the right fix indeed, but my understanding of json
reaches its bounds here.

Without this change, any example in this file that references a
spi-controller.yaml property (which is correctly defined) will throw an
error. The fact is, all the examples out there with a spi-nor flash
using the jedec,spi-nor compatible *cannot* contain any
spi-controller.yaml property, otherwise the tooling errors out. This is
a real issue.

I will give Pratyush's series a try.

Thanks,
Miquèl

Re: [PATCH v2 2/5] dt-bindings: mtd: spi-nor: Allow external properties

[Rob Herring]

On Thu, Dec 2, 2021 at 1:25 AM Miquel Raynal <miquel.raynal@bootlin.com> wrote:
>
> Hi Rob,
>
> robh@kernel.org wrote on Wed, 1 Dec 2021 18:05:41 -0600:
>
> > On Fri, Nov 26, 2021 at 05:34:47PM +0100, Miquel Raynal wrote:
> > > Setting "additionalProperties: false" will refuse any generic SPI
> > > property while they should be of course authorized. In practice it looks
> > > like many people used compatibles different than "jedec,spi-nor" in
> > > order to workaround this limitation because otherwise no SPI property
> > > could be used in the examples. Use "unevaluatedProperties: false"
> > > instead to allow defined properties to be used. It is likely that at the
> > > time of the conversion to yaml of the jedec file, the unevaluated
> > > keyword was not yet introduced.
> > >
> > > Fixes: 3ff9ee2a8890 ("dt-bindings: mtd: spi-nor: Convert to DT schema format")
> > > Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
> > > ---
> > >  Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml | 2 +-
> > >  1 file changed, 1 insertion(+), 1 deletion(-)
> > >
> > > diff --git a/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml b/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml
> > > index ed590d7c6e37..81be0620b264 100644
> > > --- a/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml
> > > +++ b/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml
> > > @@ -88,7 +88,7 @@ patternProperties:
> > >    "^otp(-[0-9]+)?$":
> > >      type: object
> > >
> > > -additionalProperties: false
> > > +unevaluatedProperties: false
> >
> > This has no effect unless you have referenced some other schema here.
> > The series I referenced will solve what your trying to solve I think.
>
> Maybe this is not the right fix indeed, but my understanding of json
> reaches its bounds here.
>
> Without this change, any example in this file that references a
> spi-controller.yaml property (which is correctly defined) will throw an
> error. The fact is, all the examples out there with a spi-nor flash
> using the jedec,spi-nor compatible *cannot* contain any
> spi-controller.yaml property, otherwise the tooling errors out. This is
> a real issue.

That's probably because unevaluatedProperties is unimplemented in the
last dtschema release, but now supported in main branch. I'll be
tagging a release soon. So once the newer version is used, you should
be back to the same error.

> I will give Pratyush's series a try.

Referencing spi-peripheral.yaml with 'unevaluatedProperties: false'
should give you what you need.

Rob

[PATCH v2 3/5] dt-bindings: mtd: spi-nor: Allow two CS per device

[Miquel Raynal]

This will be needed in order to be able to describe Xilinx QSPI
controller stacked and parallel modes.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
 Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml b/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml
index 81be0620b264..b61e448d1394 100644
--- a/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml
+++ b/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml
@@ -46,7 +46,8 @@ properties:
       identified by the JEDEC READ ID opcode (0x9F).
 
   reg:
-    maxItems: 1
+    minItems: 1
+    maxItems: 2
 
   spi-max-frequency: true
   spi-rx-bus-width: true
-- 
2.27.0

Re: [PATCH v2 3/5] dt-bindings: mtd: spi-nor: Allow two CS per device

[Rob Herring]

On Fri, 26 Nov 2021 17:34:48 +0100, Miquel Raynal wrote:
> This will be needed in order to be able to describe Xilinx QSPI
> controller stacked and parallel modes.
> 
> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
> ---
>  Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 

Acked-by: Rob Herring <robh@kernel.org>

[PATCH v2 4/5] spi: dt-bindings: Describe stacked/parallel memories modes

[Miquel Raynal]

Describe two new memories modes:
- A stacked mode when the bus is common but the address space extended
  with an additinals wires.
- A parallel mode with parallel busses accessing parallel flashes where
  the data is spread.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
 .../bindings/spi/spi-controller.yaml          | 21 +++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/Documentation/devicetree/bindings/spi/spi-controller.yaml b/Documentation/devicetree/bindings/spi/spi-controller.yaml
index 556c5ddc39d2..1ceba6c7430d 100644
--- a/Documentation/devicetree/bindings/spi/spi-controller.yaml
+++ b/Documentation/devicetree/bindings/spi/spi-controller.yaml
@@ -162,6 +162,27 @@ patternProperties:
         description:
           Delay, in microseconds, after a write transfer.
 
+      stacked-memories:
+        type: boolean
+        description: Several SPI memories can be wired in stacked mode.
+          This basically means that either a device features several chip
+          selects, or that different devices must be seen as a single
+          bigger chip. This basically doubles (or more) the total address
+          space with only a single additional wire, while still needing
+          to repeat the commands when crossing a chip boundary. XIP is
+          usually not supported in this mode.
+
+      parallel-memories:
+        type: boolean
+        description: Several SPI memories can be wired in parallel mode.
+          The devices are physically on a different buses but will always
+          act synchronously as each data word is spread across the
+          different memories (eg. even bits are stored in one memory, odd
+          bits in the other). This basically doubles the address space and
+          the throughput while greatly complexifying the wiring because as
+          many busses as devices must be wired. XIP is usually not
+          supported in this mode.
+
     required:
       - compatible
       - reg
-- 
2.27.0

Re: [PATCH v2 4/5] spi: dt-bindings: Describe stacked/parallel memories modes

[Rob Herring]

On Fri, Nov 26, 2021 at 05:34:49PM +0100, Miquel Raynal wrote:
> Describe two new memories modes:
> - A stacked mode when the bus is common but the address space extended
>   with an additinals wires.
> - A parallel mode with parallel busses accessing parallel flashes where
>   the data is spread.

I don't quite understand why this is in spi-controller.yaml.

Also, please see this series[1].

Rob

[1] https://lore.kernel.org/all/20211109181911.2251-1-p.yadav@ti.com/

[PATCH v2 5/5] spi: dt-bindings: Add an example with two stacked flashes

[Miquel Raynal]

Provide an example of how to describe two flashes in eg. stacked mode.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
 Documentation/devicetree/bindings/spi/spi-controller.yaml | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/Documentation/devicetree/bindings/spi/spi-controller.yaml b/Documentation/devicetree/bindings/spi/spi-controller.yaml
index 1ceba6c7430d..7a3fb237830a 100644
--- a/Documentation/devicetree/bindings/spi/spi-controller.yaml
+++ b/Documentation/devicetree/bindings/spi/spi-controller.yaml
@@ -225,4 +225,11 @@ examples:
             spi-max-frequency = <100000>;
             reg = <1>;
         };
+
+        flash@2,3 {
+          compatible = "jedec,spi-nor";
+          spi-max-frequency = <50000000>;
+          reg = <2>, <3>;
+          stacked-memories;
+        };
     };
-- 
2.27.0

Re: [PATCH v2 5/5] spi: dt-bindings: Add an example with two stacked flashes

[Rob Herring]

On Fri, 26 Nov 2021 17:34:50 +0100, Miquel Raynal wrote:
> Provide an example of how to describe two flashes in eg. stacked mode.
> 
> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
> ---
>  Documentation/devicetree/bindings/spi/spi-controller.yaml | 7 +++++++
>  1 file changed, 7 insertions(+)
> 

My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):

yamllint warnings/errors:

dtschema/dtc warnings/errors:
Documentation/devicetree/bindings/spi/spi-controller.example.dts:40.23-45.15: Warning (spi_bus_reg): /example-0/spi@80010000/flash@2,3: SPI bus unit address format error, expected "2"

doc reference errors (make refcheckdocs):

See https://patchwork.ozlabs.org/patch/1560255

This check can fail if there are any dependencies. The base for a patch
series is generally the most recent rc1.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit.

Re: [PATCH v2 5/5] spi: dt-bindings: Add an example with two stacked flashes

[Rob Herring]

On Sat, Nov 27, 2021 at 04:13:22PM -0700, Rob Herring wrote:
> On Fri, 26 Nov 2021 17:34:50 +0100, Miquel Raynal wrote:
> > Provide an example of how to describe two flashes in eg. stacked mode.
> > 
> > Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
> > ---
> >  Documentation/devicetree/bindings/spi/spi-controller.yaml | 7 +++++++
> >  1 file changed, 7 insertions(+)
> > 
> 
> My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
> on your patch (DT_CHECKER_FLAGS is new in v5.13):
> 
> yamllint warnings/errors:
> 
> dtschema/dtc warnings/errors:
> Documentation/devicetree/bindings/spi/spi-controller.example.dts:40.23-45.15: Warning (spi_bus_reg): /example-0/spi@80010000/flash@2,3: SPI bus unit address format error, expected "2"

Unit-addresses are based on the first reg entry.

Re: [PATCH v2 5/5] spi: dt-bindings: Add an example with two stacked flashes

[Miquel Raynal]

Hi Rob,

robh@kernel.org wrote on Sun, 28 Nov 2021 10:55:06 -0600:

> On Sat, Nov 27, 2021 at 04:13:22PM -0700, Rob Herring wrote:
> > On Fri, 26 Nov 2021 17:34:50 +0100, Miquel Raynal wrote:  
> > > Provide an example of how to describe two flashes in eg. stacked mode.
> > > 
> > > Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
> > > ---
> > >  Documentation/devicetree/bindings/spi/spi-controller.yaml | 7 +++++++
> > >  1 file changed, 7 insertions(+)
> > >   
> > 
> > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
> > on your patch (DT_CHECKER_FLAGS is new in v5.13):
> > 
> > yamllint warnings/errors:
> > 
> > dtschema/dtc warnings/errors:
> > Documentation/devicetree/bindings/spi/spi-controller.example.dts:40.23-45.15: Warning (spi_bus_reg): /example-0/spi@80010000/flash@2,3: SPI bus unit address format error, expected "2"  
> 
> Unit-addresses are based on the first reg entry.

Yes, I believe this error is expected since dtc has not been yet
updated. Below the patch for adapting dtc to this new situation and
keep the robots happy.

How should we proceed?

Thanks,
Miquèl

---

Author: Miquel Raynal <miquel.raynal@bootlin.com>
Date:   Fri Nov 26 16:08:27 2021 +0100

    dtc: checks: spi: Allow describing flashes with two CS
    
    The Xilinx QSPI controller has two advanced modes which allow the
    controller to behave differently and consider two flashes as one single
    storage.
    
    One of these two modes is quite complex to support from a binding point
    of view and is the dual parallel memories. In this mode, each byte of
    data is stored in both devices: the even bits in one, the odd bits in
    the other. The split is automatically handled by the QSPI controller and
    is transparent for the user.
    
    The other mode is simpler to support, it is called dual stacked
    memories. The controller shares the same SPI bus but each of the devices
    contain half of the data. Once in this mode, the controller does not
    follow CS requests but instead internally wires the two CSlevels with
    the value of the most significant address bit.
    
    Supporting these two modes will involve core changes which include the
    possibility of providing two CS for a single SPI device.
    
    Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>

diff --git a/scripts/dtc/checks.c b/scripts/dtc/checks.c
index 781ba1129a8e..4eaa925c3442 100644
--- a/scripts/dtc/checks.c
+++ b/scripts/dtc/checks.c
@@ -1094,7 +1094,7 @@ static const struct bus_type spi_bus = {
 
 static void check_spi_bus_bridge(struct check *c, struct dt_info *dti, struct node *node)
 {
-       int spi_addr_cells = 1;
+       int spi_addr_cells = 2;
 
        if (strprefixeq(node->name, node->basenamelen, "spi")) {
                node->bus = &spi_bus;
@@ -1125,7 +1125,7 @@ static void check_spi_bus_bridge(struct check *c, struct dt_info *dti, struct no
 
        if (get_property(node, "spi-slave"))
                spi_addr_cells = 0;
-       if (node_addr_cells(node) != spi_addr_cells)
+       if (node_addr_cells(node) > spi_addr_cells)
                FAIL(c, dti, node, "incorrect #address-cells for SPI bus");
        if (node_size_cells(node) != 0)
                FAIL(c, dti, node, "incorrect #size-cells for SPI bus");
@@ -1137,8 +1137,8 @@ static void check_spi_bus_reg(struct check *c, struct dt_info *dti, struct node
 {
        struct property *prop;
        const char *unitname = get_unitname(node);
-       char unit_addr[9];
-       uint32_t reg = 0;
+       char unit_addr[18];
+       uint32_t reg0 = 0, reg1 = 0;
        cell_t *cells = NULL;
 
        if (!node->parent || (node->parent->bus != &spi_bus))
@@ -1156,11 +1156,17 @@ static void check_spi_bus_reg(struct check *c, struct dt_info *dti, struct node
                return;
        }
 
-       reg = fdt32_to_cpu(*cells);
-       snprintf(unit_addr, sizeof(unit_addr), "%x", reg);
-       if (!streq(unitname, unit_addr))
-               FAIL(c, dti, node, "SPI bus unit address format error, expected \"%s\"",
-                    unit_addr);
+       reg0 = fdt32_to_cpu(cells[0]);
+       snprintf(unit_addr, sizeof(unit_addr), "%x", reg0);
+       if (!streq(unitname, unit_addr)) {
+               reg1 = fdt32_to_cpu(cells[1]);
+               snprintf(unit_addr, sizeof(unit_addr), "%x,%x", reg0, reg1);
+               if (!streq(unitname, unit_addr)) {
+                       FAIL(c, dti, node,
+                            "SPI bus unit address format error, expected \"%s\"",
+                            unit_addr);
+               }
+       }
 }
 WARNING(spi_bus_reg, check_spi_bus_reg, NULL, &reg_format, &spi_bus_bridge);
 

Re: [PATCH v2 5/5] spi: dt-bindings: Add an example with two stacked flashes

[Rob Herring]

On Mon, Nov 29, 2021 at 10:23:19AM +0100, Miquel Raynal wrote:
> Hi Rob,
> 
> robh@kernel.org wrote on Sun, 28 Nov 2021 10:55:06 -0600:
> 
> > On Sat, Nov 27, 2021 at 04:13:22PM -0700, Rob Herring wrote:
> > > On Fri, 26 Nov 2021 17:34:50 +0100, Miquel Raynal wrote:  
> > > > Provide an example of how to describe two flashes in eg. stacked mode.
> > > > 
> > > > Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
> > > > ---
> > > >  Documentation/devicetree/bindings/spi/spi-controller.yaml | 7 +++++++
> > > >  1 file changed, 7 insertions(+)
> > > >   
> > > 
> > > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
> > > on your patch (DT_CHECKER_FLAGS is new in v5.13):
> > > 
> > > yamllint warnings/errors:
> > > 
> > > dtschema/dtc warnings/errors:
> > > Documentation/devicetree/bindings/spi/spi-controller.example.dts:40.23-45.15: Warning (spi_bus_reg): /example-0/spi@80010000/flash@2,3: SPI bus unit address format error, expected "2"  
> > 
> > Unit-addresses are based on the first reg entry.
> 
> Yes, I believe this error is expected since dtc has not been yet
> updated. Below the patch for adapting dtc to this new situation and
> keep the robots happy.
> 
> How should we proceed?

No, I'm saying you have this wrong. A unit-address is composed of 
different fields, not different entries of the same field. For 
example, an external parallel bus has a chip select plus address, so the 
unit-address is '<cs>,<addr>'. If you have 2 SPI chip selects, that's 2 
entries of the same thing. The SPI bus is not 2 address cells, but 1 
cell with 2 entries.

Rob

Re: [PATCH v2 5/5] spi: dt-bindings: Add an example with two stacked flashes

[Miquel Raynal]

Hi Rob,

robh@kernel.org wrote on Wed, 1 Dec 2021 17:57:15 -0600:

> On Mon, Nov 29, 2021 at 10:23:19AM +0100, Miquel Raynal wrote:
> > Hi Rob,
> > 
> > robh@kernel.org wrote on Sun, 28 Nov 2021 10:55:06 -0600:
> >   
> > > On Sat, Nov 27, 2021 at 04:13:22PM -0700, Rob Herring wrote:  
> > > > On Fri, 26 Nov 2021 17:34:50 +0100, Miquel Raynal wrote:    
> > > > > Provide an example of how to describe two flashes in eg. stacked mode.
> > > > > 
> > > > > Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
> > > > > ---
> > > > >  Documentation/devicetree/bindings/spi/spi-controller.yaml | 7 +++++++
> > > > >  1 file changed, 7 insertions(+)
> > > > >     
> > > > 
> > > > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
> > > > on your patch (DT_CHECKER_FLAGS is new in v5.13):
> > > > 
> > > > yamllint warnings/errors:
> > > > 
> > > > dtschema/dtc warnings/errors:
> > > > Documentation/devicetree/bindings/spi/spi-controller.example.dts:40.23-45.15: Warning (spi_bus_reg): /example-0/spi@80010000/flash@2,3: SPI bus unit address format error, expected "2"    
> > > 
> > > Unit-addresses are based on the first reg entry.  
> > 
> > Yes, I believe this error is expected since dtc has not been yet
> > updated. Below the patch for adapting dtc to this new situation and
> > keep the robots happy.
> > 
> > How should we proceed?  
> 
> No, I'm saying you have this wrong. A unit-address is composed of 
> different fields, not different entries of the same field. For 
> example, an external parallel bus has a chip select plus address, so the 
> unit-address is '<cs>,<addr>'. If you have 2 SPI chip selects, that's 2 
> entries of the same thing. The SPI bus is not 2 address cells, but 1 
> cell with 2 entries.

My bad, now I get it, thanks.

Cheers,
Miquèl