From: Roger Quadros <rogerq@kernel.org>
To: nm@ti.com
Cc: kishon@ti.com, vigneshr@ti.com,
linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, Roger Quadros <rogerq@kernel.org>
Subject: [PATCH v2 1/2] arm64: dts: ti: k3-am64-main: Add GPMC memory controller node
Date: Wed, 8 Dec 2021 15:15:35 +0200 [thread overview]
Message-ID: <20211208131536.23667-2-rogerq@kernel.org> (raw)
In-Reply-To: <20211208131536.23667-1-rogerq@kernel.org>
The GPMC is a unified memory controller dedicated for interfacing
with external memory devices like
- Asynchronous SRAM-like memories and ASICs
- Asynchronous, synchronous, and page mode burst NOR flash
- NAND flash
- Pseudo-SRAM devices
Signed-off-by: Roger Quadros <rogerq@kernel.org>
---
arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 19 +++++++++++++++++++
arch/arm64/boot/dts/ti/k3-am642-evm.dts | 4 ++++
arch/arm64/boot/dts/ti/k3-am642-sk.dts | 4 ++++
3 files changed, 27 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
index 5ad638b95ffc..830bfc0929b9 100644
--- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
@@ -1253,4 +1253,23 @@
bus_freq = <1000000>;
};
};
+
+ gpmc0: memory-controller@3b000000 {
+ compatible = "ti,am64-gpmc";
+ power-domains = <&k3_pds 80 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 80 0>;
+ clock-names = "fck";
+ reg = <0x00 0x03b000000 0x00 0x400>,
+ <0x00 0x050000000 0x00 0x8000000>;
+ reg-names = "cfg", "data";
+ interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
+ gpmc,num-cs = <3>;
+ gpmc,num-waitpins = <2>;
+ #address-cells = <2>;
+ #size-cells = <1>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
};
diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm.dts b/arch/arm64/boot/dts/ti/k3-am642-evm.dts
index 6726c4c7c28c..e13866a6e131 100644
--- a/arch/arm64/boot/dts/ti/k3-am642-evm.dts
+++ b/arch/arm64/boot/dts/ti/k3-am642-evm.dts
@@ -638,3 +638,7 @@
&icssg1_mdio {
status = "disabled";
};
+
+&gpmc0 {
+ status = "disabled";
+};
diff --git a/arch/arm64/boot/dts/ti/k3-am642-sk.dts b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
index 6b04745147be..e2793202af38 100644
--- a/arch/arm64/boot/dts/ti/k3-am642-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
@@ -525,3 +525,7 @@
&icssg1_mdio {
status = "disabled";
};
+
+&gpmc0 {
+ status = "disabled";
+};
--
2.17.1
next prev parent reply other threads:[~2021-12-08 13:15 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-08 13:15 [PATCH v2 0/2] arm64: dts: ti: k3-am64-main: Add GPMC & ELM nodes Roger Quadros
2021-12-08 13:15 ` Roger Quadros [this message]
2021-12-08 13:15 ` [PATCH v2 2/2] arm64: dts: ti: k3-am64-main: Add ELM (Error Location Module) node Roger Quadros
2021-12-22 17:11 ` [PATCH v2 0/2] arm64: dts: ti: k3-am64-main: Add GPMC & ELM nodes Roger Quadros
2021-12-23 13:28 ` Nishanth Menon
2022-02-01 16:33 ` Nishanth Menon
2022-02-01 19:00 ` Roger Quadros
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20211208131536.23667-2-rogerq@kernel.org \
--to=rogerq@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=kishon@ti.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=nm@ti.com \
--cc=vigneshr@ti.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).