[PATCH V2 0/3] add i.MX8ULP scmi power domain

[PATCH V2 0/3] add i.MX8ULP scmi power domain

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

V2:
 There is no dependency now.
 Use Hyphen for node name in patch 2/3
 Add A-b in patch 1/3

This patchset is to add device tree support for i.MX8ULP SCMI firmware,
and enable it for USDHC node

Peng Fan (3):
  dt-bindings: power: imx8ulp: add power domain header file
  arm64: dts: imx8ulp: add scmi firmware node
  arm64: dts: imx8ulp: add power domain entry for usdhc

 arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 38 ++++++++++++++++++++++
 include/dt-bindings/power/imx8ulp-power.h  | 26 +++++++++++++++
 2 files changed, 64 insertions(+)
 create mode 100644 include/dt-bindings/power/imx8ulp-power.h

-- 
2.25.1

[PATCH V2 1/3] dt-bindings: power: imx8ulp: add power domain header file

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

Add i.MX8ULP power domain header file

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 include/dt-bindings/power/imx8ulp-power.h | 26 +++++++++++++++++++++++
 1 file changed, 26 insertions(+)
 create mode 100644 include/dt-bindings/power/imx8ulp-power.h

diff --git a/include/dt-bindings/power/imx8ulp-power.h b/include/dt-bindings/power/imx8ulp-power.h
new file mode 100644
index 000000000000..a556b2e96df1
--- /dev/null
+++ b/include/dt-bindings/power/imx8ulp-power.h
@@ -0,0 +1,26 @@
+/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
+/*
+ *  Copyright 2021 NXP
+ */
+
+#ifndef __DT_BINDINGS_IMX8ULP_POWER_H__
+#define __DT_BINDINGS_IMX8ULP_POWER_H__
+
+#define IMX8ULP_PD_DMA1		0
+#define IMX8ULP_PD_FLEXSPI2	1
+#define IMX8ULP_PD_USB0		2
+#define IMX8ULP_PD_USDHC0	3
+#define IMX8ULP_PD_USDHC1	4
+#define IMX8ULP_PD_USDHC2_USB1	5
+#define IMX8ULP_PD_DCNANO	6
+#define IMX8ULP_PD_EPDC		7
+#define IMX8ULP_PD_DMA2		8
+#define IMX8ULP_PD_GPU2D	9
+#define IMX8ULP_PD_GPU3D	10
+#define IMX8ULP_PD_HIFI4	11
+#define IMX8ULP_PD_ISI		12
+#define IMX8ULP_PD_MIPI_CSI	13
+#define IMX8ULP_PD_MIPI_DSI	14
+#define IMX8ULP_PD_PXP		15
+
+#endif
-- 
2.25.1

[PATCH V2 2/3] arm64: dts: imx8ulp: add scmi firmware node

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

i.MX8ULP use scmi firmware based power domain and sensor support.
So add the firmware node and the sram it uses.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 35 ++++++++++++++++++++++
 1 file changed, 35 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
index fb8714379026..8ee040e3cbae 100644
--- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
@@ -6,6 +6,7 @@
 #include <dt-bindings/clock/imx8ulp-clock.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/power/imx8ulp-power.h>
 
 #include "imx8ulp-pinfunc.h"
 
@@ -102,6 +103,40 @@ sosc: clock-sosc {
 		#clock-cells = <0>;
 	};
 
+	sram@2201f000 {
+		compatible = "mmio-sram";
+		reg = <0x0 0x2201f000 0x0 0x1000>;
+
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0 0x0 0x2201f000 0x1000>;
+
+		scmi_buf: scmi-buf@0 {
+			compatible = "arm,scmi-shmem";
+			reg = <0x0 0x400>;
+		};
+	};
+
+	firmware {
+		scmi {
+			compatible = "arm,scmi-smc";
+			arm,smc-id = <0xc20000fe>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			shmem = <&scmi_buf>;
+
+			scmi_devpd: protocol@11 {
+				reg = <0x11>;
+				#power-domain-cells = <1>;
+			};
+
+			scmi_sensor: protocol@15 {
+				reg = <0x15>;
+				#thermal-sensor-cells = <0>;
+			};
+		};
+	};
+
 	soc@0 {
 		compatible = "simple-bus";
 		#address-cells = <1>;
-- 
2.25.1

[PATCH V2 3/3] arm64: dts: imx8ulp: add power domain entry for usdhc

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

Add power domain for USDHC node.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
index 8ee040e3cbae..a987ff7156bd 100644
--- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
@@ -329,6 +329,7 @@ usdhc0: mmc@298d0000 {
 					 <&cgc1 IMX8ULP_CLK_XBAR_AD_DIVPLAT>,
 					 <&pcc4 IMX8ULP_CLK_USDHC0>;
 				clock-names = "ipg", "ahb", "per";
+				power-domains = <&scmi_devpd IMX8ULP_PD_USDHC0>;
 				fsl,tuning-start-tap = <20>;
 				fsl,tuning-step= <2>;
 				bus-width = <4>;
@@ -343,6 +344,7 @@ usdhc1: mmc@298e0000 {
 					 <&cgc1 IMX8ULP_CLK_NIC_PER_DIVPLAT>,
 					 <&pcc4 IMX8ULP_CLK_USDHC1>;
 				clock-names = "ipg", "ahb", "per";
+				power-domains = <&scmi_devpd IMX8ULP_PD_USDHC1>;
 				fsl,tuning-start-tap = <20>;
 				fsl,tuning-step= <2>;
 				bus-width = <4>;
@@ -357,6 +359,7 @@ usdhc2: mmc@298f0000 {
 					 <&cgc1 IMX8ULP_CLK_NIC_PER_DIVPLAT>,
 					 <&pcc4 IMX8ULP_CLK_USDHC2>;
 				clock-names = "ipg", "ahb", "per";
+				power-domains = <&scmi_devpd IMX8ULP_PD_USDHC2_USB1>;
 				fsl,tuning-start-tap = <20>;
 				fsl,tuning-step= <2>;
 				bus-width = <4>;
-- 
2.25.1

Re: [PATCH V2 0/3] add i.MX8ULP scmi power domain

[Shawn Guo]

On Wed, Dec 08, 2021 at 09:17:52PM +0800, Peng Fan (OSS) wrote:
> From: Peng Fan <peng.fan@nxp.com>
> 
> V2:
>  There is no dependency now.
>  Use Hyphen for node name in patch 2/3
>  Add A-b in patch 1/3
> 
> This patchset is to add device tree support for i.MX8ULP SCMI firmware,
> and enable it for USDHC node
> 
> Peng Fan (3):
>   dt-bindings: power: imx8ulp: add power domain header file
>   arm64: dts: imx8ulp: add scmi firmware node
>   arm64: dts: imx8ulp: add power domain entry for usdhc

Applied all, thanks!