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From: Ansuel Smith <ansuelsmth@gmail.com>
To: Andy Gross <agross@kernel.org>,
	Bjorn Andersson <bjorn.andersson@linaro.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh+dt@kernel.org>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Taniya Das <tdas@codeaurora.org>,
	Ansuel Smith <ansuelsmth@gmail.com>,
	linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH v3 04/15] drivers: clk: qcom: gcc-ipq806x: fix wrong naming for gcc_pxo_pll8_pll0
Date: Fri, 21 Jan 2022 22:03:29 +0100	[thread overview]
Message-ID: <20220121210340.32362-5-ansuelsmth@gmail.com> (raw)
In-Reply-To: <20220121210340.32362-1-ansuelsmth@gmail.com>

Parent gcc_pxo_pll8_pll0 had the parent definition and parent map
swapped. Fix this naming error.

Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
---
 drivers/clk/qcom/gcc-ipq806x.c | 20 ++++++++++----------
 1 file changed, 10 insertions(+), 10 deletions(-)

diff --git a/drivers/clk/qcom/gcc-ipq806x.c b/drivers/clk/qcom/gcc-ipq806x.c
index d6b7adb4be38..34cddf461dba 100644
--- a/drivers/clk/qcom/gcc-ipq806x.c
+++ b/drivers/clk/qcom/gcc-ipq806x.c
@@ -291,13 +291,13 @@ static const char * const gcc_pxo_pll3[] = {
 	"pll3",
 };
 
-static const struct parent_map gcc_pxo_pll8_pll0[] = {
+static const struct parent_map gcc_pxo_pll8_pll0_map[] = {
 	{ P_PXO, 0 },
 	{ P_PLL8, 3 },
 	{ P_PLL0, 2 }
 };
 
-static const char * const gcc_pxo_pll8_pll0_map[] = {
+static const char * const gcc_pxo_pll8_pll0[] = {
 	"pxo",
 	"pll8_vote",
 	"pll0_vote",
@@ -1993,7 +1993,7 @@ static struct clk_rcg usb30_master_clk_src = {
 	},
 	.s = {
 		.src_sel_shift = 0,
-		.parent_map = gcc_pxo_pll8_pll0,
+		.parent_map = gcc_pxo_pll8_pll0_map,
 	},
 	.freq_tbl = clk_tbl_usb30_master,
 	.clkr = {
@@ -2001,7 +2001,7 @@ static struct clk_rcg usb30_master_clk_src = {
 		.enable_mask = BIT(11),
 		.hw.init = &(struct clk_init_data){
 			.name = "usb30_master_ref_src",
-			.parent_names = gcc_pxo_pll8_pll0_map,
+			.parent_names = gcc_pxo_pll8_pll0,
 			.num_parents = 3,
 			.ops = &clk_rcg_ops,
 			.flags = CLK_SET_RATE_GATE,
@@ -2063,7 +2063,7 @@ static struct clk_rcg usb30_utmi_clk = {
 	},
 	.s = {
 		.src_sel_shift = 0,
-		.parent_map = gcc_pxo_pll8_pll0,
+		.parent_map = gcc_pxo_pll8_pll0_map,
 	},
 	.freq_tbl = clk_tbl_usb30_utmi,
 	.clkr = {
@@ -2071,7 +2071,7 @@ static struct clk_rcg usb30_utmi_clk = {
 		.enable_mask = BIT(11),
 		.hw.init = &(struct clk_init_data){
 			.name = "usb30_utmi_clk",
-			.parent_names = gcc_pxo_pll8_pll0_map,
+			.parent_names = gcc_pxo_pll8_pll0,
 			.num_parents = 3,
 			.ops = &clk_rcg_ops,
 			.flags = CLK_SET_RATE_GATE,
@@ -2133,7 +2133,7 @@ static struct clk_rcg usb_hs1_xcvr_clk_src = {
 	},
 	.s = {
 		.src_sel_shift = 0,
-		.parent_map = gcc_pxo_pll8_pll0,
+		.parent_map = gcc_pxo_pll8_pll0_map,
 	},
 	.freq_tbl = clk_tbl_usb,
 	.clkr = {
@@ -2141,7 +2141,7 @@ static struct clk_rcg usb_hs1_xcvr_clk_src = {
 		.enable_mask = BIT(11),
 		.hw.init = &(struct clk_init_data){
 			.name = "usb_hs1_xcvr_src",
-			.parent_names = gcc_pxo_pll8_pll0_map,
+			.parent_names = gcc_pxo_pll8_pll0,
 			.num_parents = 3,
 			.ops = &clk_rcg_ops,
 			.flags = CLK_SET_RATE_GATE,
@@ -2197,7 +2197,7 @@ static struct clk_rcg usb_fs1_xcvr_clk_src = {
 	},
 	.s = {
 		.src_sel_shift = 0,
-		.parent_map = gcc_pxo_pll8_pll0,
+		.parent_map = gcc_pxo_pll8_pll0_map,
 	},
 	.freq_tbl = clk_tbl_usb,
 	.clkr = {
@@ -2205,7 +2205,7 @@ static struct clk_rcg usb_fs1_xcvr_clk_src = {
 		.enable_mask = BIT(11),
 		.hw.init = &(struct clk_init_data){
 			.name = "usb_fs1_xcvr_src",
-			.parent_names = gcc_pxo_pll8_pll0_map,
+			.parent_names = gcc_pxo_pll8_pll0,
 			.num_parents = 3,
 			.ops = &clk_rcg_ops,
 			.flags = CLK_SET_RATE_GATE,
-- 
2.33.1


  parent reply	other threads:[~2022-01-21 21:04 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-01-21 21:03 [PATCH v3 00/15] Multiple addition and improvement to ipq8064 gcc Ansuel Smith
2022-01-21 21:03 ` [PATCH v3 01/15] dt-bindings: clock: split qcom,gcc.yaml to common and specific schema Ansuel Smith
2022-01-31 23:11   ` Bjorn Andersson
2022-02-01 21:53     ` Ansuel Smith
2022-01-21 21:03 ` [PATCH v3 02/15] dt-bindings: clock: simplify qcom,gcc-apq8064 Documentation Ansuel Smith
2022-01-21 21:03 ` [PATCH v3 03/15] dt-bindings: clock: Document qcom,gcc-ipq8064 binding Ansuel Smith
2022-01-21 21:03 ` Ansuel Smith [this message]
2022-01-31 23:13   ` [PATCH v3 04/15] drivers: clk: qcom: gcc-ipq806x: fix wrong naming for gcc_pxo_pll8_pll0 Bjorn Andersson
2022-01-21 21:03 ` [PATCH v3 05/15] drivers: clk: qcom: gcc-ipq806x: convert parent_names to parent_data Ansuel Smith
2022-01-21 21:03 ` [PATCH v3 06/15] drivers: clk: qcom: gcc-ipq806x: use ARRAY_SIZE for num_parents Ansuel Smith
2022-01-21 21:03 ` [PATCH v3 07/15] drivers: clk: qcom: gcc-ipq806x: drop hardcoded pxo and cxo source clk Ansuel Smith
2022-01-21 21:03 ` [PATCH v3 08/15] drivers: clk: qcom: gcc-ipq806x: add additional freq nss cores Ansuel Smith
2022-01-21 21:03 ` [PATCH v3 09/15] drivers: clk: qcom: gcc-ipq806x: add unusued flag for critical clock Ansuel Smith
2022-01-21 21:03 ` [PATCH v3 10/15] drivers: clk: qcom: gcc-ipq806x: add additional freq for sdc table Ansuel Smith
2022-01-25 20:45   ` Stephen Boyd
2022-01-25 21:03     ` Ansuel Smith
2022-01-25 22:18       ` Stephen Boyd
2022-02-01 22:01         ` Ansuel Smith
2022-02-05  3:03           ` Stephen Boyd
2022-01-21 21:03 ` [PATCH v3 11/15] dt-bindings: clock: add ipq8064 ce5 clk define Ansuel Smith
2022-01-25 20:47   ` Stephen Boyd
2022-01-25 21:02     ` Ansuel Smith
2022-01-21 21:03 ` [PATCH v3 12/15] drivers: clk: qcom: gcc-ipq806x: add CryptoEngine clocks Ansuel Smith
2022-01-21 21:03 ` [PATCH v3 13/15] dt-bindings: reset: add ipq8064 ce5 resets Ansuel Smith
2022-01-21 21:03 ` [PATCH v3 14/15] drivers: clk: qcom: gcc-ipq806x: add CryptoEngine resets Ansuel Smith
2022-01-21 21:03 ` [PATCH v3 15/15] ARM: dts: qcom: Add syscon and cxo/pxo clock to gcc node for ipq8064 Ansuel Smith

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