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From: Heiko Stuebner <heiko@sntech.de>
To: palmer@dabbelt.com, paul.walmsley@sifive.com, aou@eecs.berkeley.edu
Cc: linux-riscv@lists.infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, robh+dt@kernel.org,
	wefu@redhat.com, liush@allwinnertech.com, guoren@kernel.org,
	atishp@atishpatra.org, anup@brainfault.org, drew@beagleboard.org,
	hch@lst.de, arnd@arndb.de, wens@csie.org, maxime@cerno.tech,
	gfavor@ventanamicro.com, andrea.mondelli@huawei.com,
	behrensj@mit.edu, xinhaoqu@huawei.com, huffman@cadence.com,
	mick@ics.forth.gr, allen.baum@esperantotech.com,
	jscheid@ventanamicro.com, rtrauben@gmail.com,
	samuel@sholland.org, cmuellner@linux.com,
	philipp.tomsich@vrull.eu, Heiko Stuebner <heiko@sntech.de>
Subject: [PATCH v6 01/14] riscv: prevent null-pointer dereference with sbi_remote_fence_i
Date: Wed,  9 Feb 2022 13:37:47 +0100	[thread overview]
Message-ID: <20220209123800.269774-2-heiko@sntech.de> (raw)
In-Reply-To: <20220209123800.269774-1-heiko@sntech.de>

The callback used inside sbi_remote_fence_i is set at sbi probe time
to the needed variant. Before that it is a NULL pointer.

Some users like the flush_icache_*() functions suggest a generic
functionality, that doesn't depend on a specific boot-stage but
uses sbi_remote_fence_i as one option to flush other cpu cores.

So they definitly shouldn't run into null-pointer dereference
issues when called "too early" during boot.

So introduce an empty function to be the standard for the __sbi_rfence
function pointer until sbi_init has run.

Users of sbi_remote_fence_i will have separate code for the local
cpu and sbi_init() is called before other cpus are brought up.
So there are no other cpus present at the time when the issue
might happen.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
 arch/riscv/kernel/sbi.c | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/arch/riscv/kernel/sbi.c b/arch/riscv/kernel/sbi.c
index f72527fcb347..c839acd668d3 100644
--- a/arch/riscv/kernel/sbi.c
+++ b/arch/riscv/kernel/sbi.c
@@ -15,11 +15,19 @@
 unsigned long sbi_spec_version __ro_after_init = SBI_SPEC_VERSION_DEFAULT;
 EXPORT_SYMBOL(sbi_spec_version);
 
+static int __sbi_rfence_none(int fid, const struct cpumask *cpu_mask,
+			     unsigned long start, unsigned long size,
+			     unsigned long arg4, unsigned long arg5)
+{
+	return -EOPNOTSUPP;
+}
+
 static void (*__sbi_set_timer)(uint64_t stime) __ro_after_init;
 static int (*__sbi_send_ipi)(const struct cpumask *cpu_mask) __ro_after_init;
 static int (*__sbi_rfence)(int fid, const struct cpumask *cpu_mask,
 			   unsigned long start, unsigned long size,
-			   unsigned long arg4, unsigned long arg5) __ro_after_init;
+			   unsigned long arg4, unsigned long arg5)
+			   __ro_after_init = __sbi_rfence_none;
 
 struct sbiret sbi_ecall(int ext, int fid, unsigned long arg0,
 			unsigned long arg1, unsigned long arg2,
-- 
2.30.2


  reply	other threads:[~2022-02-09 12:38 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-02-09 12:37 [PATCH v6 00/14] riscv: support for Svpbmt and D1 memory types Heiko Stuebner
2022-02-09 12:37 ` Heiko Stuebner [this message]
2022-02-11  1:59   ` [PATCH v6 01/14] riscv: prevent null-pointer dereference with sbi_remote_fence_i Atish Patra
2022-02-09 12:37 ` [PATCH v6 02/14] riscv: integrate alternatives better into the main architecture Heiko Stuebner
2022-02-09 12:37 ` [PATCH v6 03/14] riscv: allow different stages with alternatives Heiko Stuebner
2022-02-09 12:37 ` [PATCH v6 04/14] riscv: implement module alternatives Heiko Stuebner
2022-02-09 12:37 ` [PATCH v6 05/14] riscv: implement ALTERNATIVE_2 macro Heiko Stuebner
2022-02-09 12:37 ` [PATCH v6 06/14] riscv: extend concatenated alternatives-lines to the same length Heiko Stuebner
2022-02-09 12:37 ` [PATCH v6 07/14] riscv: prevent compressed instructions in alternatives Heiko Stuebner
2022-03-08  0:47   ` Palmer Dabbelt
2022-02-09 12:37 ` [PATCH v6 08/14] riscv: move boot alternatives to a slightly earlier position Heiko Stuebner
2022-02-10 22:42   ` Atish Patra
2022-02-11  1:11     ` Heiko Stübner
2022-02-11  1:57       ` Atish Patra
2022-02-11  9:34         ` Heiko Stübner
2022-03-08  0:47   ` Palmer Dabbelt
2022-03-23 16:51     ` Heiko Stübner
2022-02-09 12:37 ` [PATCH v6 09/14] riscv: Fix accessing pfn bits in PTEs for non-32bit variants Heiko Stuebner
2022-02-09 12:37 ` [PATCH v6 10/14] riscv: add cpufeature handling via alternatives Heiko Stuebner
2022-02-09 12:37 ` [PATCH v6 11/14] dt-bindings: riscv: add MMU Standard Extensions support for Svpbmt Heiko Stuebner
2022-02-09 18:47   ` Rob Herring
2022-02-09 12:37 ` [PATCH v6 12/14] riscv: add RISC-V Svpbmt extension support Heiko Stuebner
2022-02-09 12:37 ` [PATCH v6 13/14] riscv: remove FIXMAP_PAGE_IO and fall back to its default value Heiko Stuebner
2022-02-09 12:38 ` [PATCH v6 14/14] riscv: add memory-type errata for T-Head Heiko Stuebner
2022-02-11  0:12   ` Atish Patra
2022-02-11  9:25     ` Heiko Stübner
2022-02-12  0:27       ` Atish Patra
2022-02-11  2:01   ` Atish Patra
2022-02-14  3:42   ` Samuel Holland
2022-02-09 17:49 ` [PATCH v6 00/14] riscv: support for Svpbmt and D1 memory types Jisheng Zhang
2022-02-09 23:44   ` Heiko Stübner
2022-02-10 16:01     ` Jisheng Zhang
2022-02-11  0:25 ` Atish Patra
2022-02-11  1:48   ` Atish Patra
2022-02-11  2:04     ` Heiko Stübner
2022-02-12  0:25       ` Atish Patra
2022-02-14 20:02         ` Heiko Stübner
2022-02-14 20:25           ` Atish Patra
2022-02-14 20:37             ` Heiko Stübner
2022-03-09  7:56 ` Guo Ren

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