* [PATCH 5/8] ARM: dts: qcom: sdx65: Add support for A7 PLL clock
@ 2022-02-14 7:01 Rohit Agarwal
2022-02-14 8:43 ` Manivannan Sadhasivam
0 siblings, 1 reply; 2+ messages in thread
From: Rohit Agarwal @ 2022-02-14 7:01 UTC (permalink / raw)
To: agross, bjorn.andersson, robh+dt
Cc: linux-arm-msm, devicetree, linux-kernel, Rohit Agarwal
On SDX65 there is a separate A7 PLL which is used to provide high
frequency clock to the Cortex A7 CPU via a MUX.
Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
---
arch/arm/boot/dts/qcom-sdx65.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi
index 556a2e3..2900ffe 100644
--- a/arch/arm/boot/dts/qcom-sdx65.dtsi
+++ b/arch/arm/boot/dts/qcom-sdx65.dtsi
@@ -125,6 +125,14 @@
<0x17802000 0x1000>;
};
+ a7pll: clock@17808000 {
+ compatible = "qcom,sdx65-a7pll";
+ reg = <0x17808000 0x1000>;
+ clocks = <&rpmhcc RPMH_CXO_CLK>;
+ clock-names = "bi_tcxo";
+ #clock-cells = <0>;
+ };
+
timer@17820000 {
#address-cells = <1>;
#size-cells = <1>;
--
2.7.4
^ permalink raw reply related [flat|nested] 2+ messages in thread* Re: [PATCH 5/8] ARM: dts: qcom: sdx65: Add support for A7 PLL clock
2022-02-14 7:01 [PATCH 5/8] ARM: dts: qcom: sdx65: Add support for A7 PLL clock Rohit Agarwal
@ 2022-02-14 8:43 ` Manivannan Sadhasivam
0 siblings, 0 replies; 2+ messages in thread
From: Manivannan Sadhasivam @ 2022-02-14 8:43 UTC (permalink / raw)
To: Rohit Agarwal
Cc: agross, bjorn.andersson, robh+dt, linux-arm-msm, devicetree,
linux-kernel
On Mon, Feb 14, 2022 at 12:31:09PM +0530, Rohit Agarwal wrote:
> On SDX65 there is a separate A7 PLL which is used to provide high
> frequency clock to the Cortex A7 CPU via a MUX.
>
> Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Thanks,
Mani
> ---
> arch/arm/boot/dts/qcom-sdx65.dtsi | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi
> index 556a2e3..2900ffe 100644
> --- a/arch/arm/boot/dts/qcom-sdx65.dtsi
> +++ b/arch/arm/boot/dts/qcom-sdx65.dtsi
> @@ -125,6 +125,14 @@
> <0x17802000 0x1000>;
> };
>
> + a7pll: clock@17808000 {
> + compatible = "qcom,sdx65-a7pll";
> + reg = <0x17808000 0x1000>;
> + clocks = <&rpmhcc RPMH_CXO_CLK>;
> + clock-names = "bi_tcxo";
> + #clock-cells = <0>;
> + };
> +
> timer@17820000 {
> #address-cells = <1>;
> #size-cells = <1>;
> --
> 2.7.4
>
^ permalink raw reply [flat|nested] 2+ messages in thread
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