* [PATCH 6/8] ARM: dts: qcom: sdx65: Add support for APCS block
@ 2022-02-14 7:02 Rohit Agarwal
2022-02-14 8:44 ` Manivannan Sadhasivam
0 siblings, 1 reply; 2+ messages in thread
From: Rohit Agarwal @ 2022-02-14 7:02 UTC (permalink / raw)
To: agross, bjorn.andersson, robh+dt
Cc: linux-arm-msm, devicetree, linux-kernel, Rohit Agarwal
The APCS block on SDX65 acts as a mailbox controller and also provides
clock output for the Cortex A7 CPU.
Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
---
arch/arm/boot/dts/qcom-sdx65.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi
index 2900ffe..1646c7c 100644
--- a/arch/arm/boot/dts/qcom-sdx65.dtsi
+++ b/arch/arm/boot/dts/qcom-sdx65.dtsi
@@ -133,6 +133,15 @@
#clock-cells = <0>;
};
+ apcs: mailbox@17810000 {
+ compatible = "qcom,sdx65-apcs-gcc", "syscon";
+ reg = <0x17810000 0x2000>;
+ #mbox-cells = <1>;
+ clocks = <&rpmhcc RPMH_CXO_CLK>, <&a7pll>, <&gcc GPLL0>;
+ clock-names = "ref", "pll", "aux";
+ #clock-cells = <0>;
+ };
+
timer@17820000 {
#address-cells = <1>;
#size-cells = <1>;
--
2.7.4
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH 6/8] ARM: dts: qcom: sdx65: Add support for APCS block
2022-02-14 7:02 [PATCH 6/8] ARM: dts: qcom: sdx65: Add support for APCS block Rohit Agarwal
@ 2022-02-14 8:44 ` Manivannan Sadhasivam
0 siblings, 0 replies; 2+ messages in thread
From: Manivannan Sadhasivam @ 2022-02-14 8:44 UTC (permalink / raw)
To: Rohit Agarwal
Cc: agross, bjorn.andersson, robh+dt, linux-arm-msm, devicetree,
linux-kernel
On Mon, Feb 14, 2022 at 12:32:17PM +0530, Rohit Agarwal wrote:
> The APCS block on SDX65 acts as a mailbox controller and also provides
> clock output for the Cortex A7 CPU.
>
> Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Thanks,
Mani
> ---
> arch/arm/boot/dts/qcom-sdx65.dtsi | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi
> index 2900ffe..1646c7c 100644
> --- a/arch/arm/boot/dts/qcom-sdx65.dtsi
> +++ b/arch/arm/boot/dts/qcom-sdx65.dtsi
> @@ -133,6 +133,15 @@
> #clock-cells = <0>;
> };
>
> + apcs: mailbox@17810000 {
> + compatible = "qcom,sdx65-apcs-gcc", "syscon";
> + reg = <0x17810000 0x2000>;
> + #mbox-cells = <1>;
> + clocks = <&rpmhcc RPMH_CXO_CLK>, <&a7pll>, <&gcc GPLL0>;
> + clock-names = "ref", "pll", "aux";
> + #clock-cells = <0>;
> + };
> +
> timer@17820000 {
> #address-cells = <1>;
> #size-cells = <1>;
> --
> 2.7.4
>
^ permalink raw reply [flat|nested] 2+ messages in thread
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