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From: Rex-BC Chen <rex-bc.chen@mediatek.com>
To: <wim@linux-watchdog.org>, <linux@roeck-us.net>,
	<matthias.bgg@gmail.com>, <robh+dt@kernel.org>,
	<p.zabel@pengutronix.de>
Cc: <runyang.chen@mediatek.com>, <linux-watchdog@vger.kernel.org>,
	<devicetree@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-mediatek@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>,
	<Project_Global_Chrome_Upstream_Group@mediatek.com>,
	Rex-BC Chen <rex-bc.chen@mediatek.com>
Subject: [2/4] dt-bindings: reset: mt8186: add toprgu reset-controller header file
Date: Wed, 16 Feb 2022 09:45:03 +0800	[thread overview]
Message-ID: <20220216014505.28428-3-rex-bc.chen@mediatek.com> (raw)
In-Reply-To: <20220216014505.28428-1-rex-bc.chen@mediatek.com>

From: Runyang Chen <runyang.chen@mediatek.com>

Add toprgu reset-controller header file for MT8186.

Signed-off-by: Runyang Chen <runyang.chen@mediatek.com>
Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
---
 include/dt-bindings/reset/mt8186-resets.h | 33 +++++++++++++++++++++++
 1 file changed, 33 insertions(+)
 create mode 100644 include/dt-bindings/reset/mt8186-resets.h

diff --git a/include/dt-bindings/reset/mt8186-resets.h b/include/dt-bindings/reset/mt8186-resets.h
new file mode 100644
index 000000000000..36e5764e2e6c
--- /dev/null
+++ b/include/dt-bindings/reset/mt8186-resets.h
@@ -0,0 +1,33 @@
+/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
+/*
+ * Copyright (c) 2022 MediaTek Inc.
+ * Author: Runyang Chen <runyang.chen@mediatek.com>
+ */
+
+#ifndef _DT_BINDINGS_RESET_CONTROLLER_MT8186
+#define _DT_BINDINGS_RESET_CONTROLLER_MT8186
+
+#define MT8186_TOPRGU_INFRA_SW_RST				0
+#define MT8186_TOPRGU_MM_SW_RST					1
+#define MT8186_TOPRGU_MFG_SW_RST				2
+#define MT8186_TOPRGU_VENC_SW_RST				3
+#define MT8186_TOPRGU_VDEC_SW_RST				4
+#define MT8186_TOPRGU_IMG_SW_RST				5
+#define MT8186_TOPRGU_DDR_SW_RST				6
+#define MT8186_TOPRGU_INFRA_AO_SW_RST				8
+#define MT8186_TOPRGU_CONNSYS_SW_RST				9
+#define MT8186_TOPRGU_APMIXED_SW_RST				10
+#define MT8186_TOPRGU_PWRAP_SW_RST				11
+#define MT8186_TOPRGU_CONN_MCU_SW_RST				12
+#define MT8186_TOPRGU_IPNNA_SW_RST				13
+#define MT8186_TOPRGU_WPE_SW_RST				14
+#define MT8186_TOPRGU_ADSP_SW_RST				15
+#define MT8186_TOPRGU_AUDIO_SW_RST				17
+#define MT8186_TOPRGU_CAM_MAIN_SW_RST				18
+#define MT8186_TOPRGU_CAM_RAWA_SW_RST				19
+#define MT8186_TOPRGU_CAM_RAWB_SW_RST				20
+#define MT8186_TOPRGU_IPE_SW_RST				21
+#define MT8186_TOPRGU_IMG2_SW_RST				22
+#define MT8186_TOPRGU_SW_RST_NUM				23
+
+#endif  /* _DT_BINDINGS_RESET_CONTROLLER_MT8186 */
-- 
2.18.0


  parent reply	other threads:[~2022-02-16  1:45 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <20220216014505.28428-1-rex-bc.chen@mediatek.com>
2022-02-16  1:45 ` [PATCH 1/4] dt-bindings: watchdog: Add compatible for MediaTek MT8186 Rex-BC Chen
2022-02-25 16:24   ` Rob Herring
2022-02-25 16:36   ` Guenter Roeck
2022-02-16  1:45 ` Rex-BC Chen [this message]
2022-02-25 16:25   ` [2/4] dt-bindings: reset: mt8186: add toprgu reset-controller header file Rob Herring
2022-02-25 16:37   ` Guenter Roeck
2022-03-01  2:56     ` Rex-BC Chen
2022-02-16  1:45 ` [3/4] dt-bindings: reset: mt8186: add DSI reset bit for MMSYS Rex-BC Chen
2022-02-25 16:26   ` Rob Herring
2022-03-01  2:54     ` Rex-BC Chen
2022-02-16  1:45 ` [4/4] watchdog: mediatek: mt8186: add wdt support Rex-BC Chen
2022-02-25 16:36   ` Guenter Roeck
2022-02-16  2:45 ` [0/4] Add watchdog support for MT8186 SoC Macpaul Lin

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