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From: Stephen Boyd <sboyd@kernel.org>
To: Michael Turquette <mturquette@baylibre.com>,
	Taniya Das <tdas@codeaurora.org>
Cc: Rajendra Nayak <rnayak@codeaurora.org>,
	linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org,
	linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
	devicetree@vger.kernel.org, Taniya Das <tdas@codeaurora.org>
Subject: Re: [PATCH v2 2/2] clk: qcom: clk-alpha-pll: Update to use determine rate ops for PLL
Date: Thu, 17 Feb 2022 15:17:01 -0800	[thread overview]
Message-ID: <20220217231703.8C0C8C340E8@smtp.kernel.org> (raw)
In-Reply-To: <20220202174213.21259-2-tdas@codeaurora.org>

Quoting Taniya Das (2022-02-02 09:42:13)
> diff --git a/drivers/clk/qcom/clk-alpha-pll.c b/drivers/clk/qcom/clk-alpha-pll.c
> index 4406cf609aae..4e2e93cd8c8b 100644
> --- a/drivers/clk/qcom/clk-alpha-pll.c
> +++ b/drivers/clk/qcom/clk-alpha-pll.c
> @@ -812,12 +812,25 @@ static int alpha_pll_huayra_set_rate(struct clk_hw *hw, unsigned long rate,
>         return 0;
>  }
> 
> -static long alpha_pll_huayra_round_rate(struct clk_hw *hw, unsigned long rate,
> -                                       unsigned long *prate)
> +static int alpha_pll_huayra_determine_rate(struct clk_hw *hw,
> +                                       struct clk_rate_request *req)
>  {
> +       struct clk_hw *parent_hw;
> +       unsigned long rrate, prate;
>         u32 l, a;
> 
> -       return alpha_huayra_pll_round_rate(rate, *prate, &l, &a);
> +       parent_hw = clk_hw_get_parent(hw);

The clk_rate_request should already have the parent_hw pointer set in
it. See clk_core_init_rate_req(). So there's no need to
clk_hw_get_parent() again here.

> +       if (!parent_hw)
> +               return -EINVAL;
> +
> +       prate = clk_hw_get_rate(parent_hw);

And low and behold the parent rate is also prepopulated in 'req'. Just
use that.

> +       rrate = alpha_huayra_pll_round_rate(req->rate, prate, &l, &a);
> +
> +       req->best_parent_hw = parent_hw;

Remove.

> +       req->best_parent_rate = prate;

Remove.

> +       req->rate = rrate;

Keep.

	req->rate = alpha_pll_huayra_round_rate(req->rate, prate, &l, &a);

> +
> +       return 0;
>  }
> 
>  static int trion_pll_is_enabled(struct clk_alpha_pll *pll,

  reply	other threads:[~2022-02-17 23:21 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-02-02 17:42 [PATCH v2 1/2] clk: qcom: clk-rcg2: Update the calc_rate logic to handle determine rate Taniya Das
2022-02-02 17:42 ` [PATCH v2 2/2] clk: qcom: clk-alpha-pll: Update to use determine rate ops for PLL Taniya Das
2022-02-17 23:17   ` Stephen Boyd [this message]
2022-02-17 23:14 ` [PATCH v2 1/2] clk: qcom: clk-rcg2: Update the calc_rate logic to handle determine rate Stephen Boyd

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